Dynamic control of reduced voltage state of graphics controller component of memory controller
View Patent ↗A method includes detecting a trigger condition, and in response to detecting the trigger condition, reducing a voltage applied to a graphics controller component of a memory controller. The reduction in voltage may cause the voltage to be reduced below a voltage level required to maintain context information in the graphics controller component.
1. A method comprising:
receiving a first command indicating that a processor has entered a process associated with reduced graphics processing;
in response to the received first command, storing context information in an external memory;
after said storing, disabling clock signals for a graphics controller component;
after said storing, reducing a voltage applied to the graphics controller component, said reducing causing the voltage to be reduced below a voltage level required to maintain said context information in the graphics controller component;
after said reducing, detecting issuance of a second command for the graphics controller component; and
in response to detecting issuance of the second command, increasing the voltage applied to the graphics controller component, said increasing causing the voltage to be increased to a voltage level required to support full operation of the graphics controller component.
2. The method of claim 1 , further comprising:
after said increasing, enabling the clock signals for said graphics controller component.
3. The method of claim 2 , further comprising:
after said enabling, transferring said context information from said external memory to said graphics controller component.
4. The method of claim 1 , further comprising:
enabling the clock signals for said graphics controller component after detecting issuance of the second command and prior to said increasing.
5. An apparatus comprising a memory controller, the memory controller including a graphics controller component, and the memory controller also including a power management controller for controlling a supply of power for at least a portion of the memory controller, the power management controller operative to:
receive a first command indicating that a processor has entered a process associated with reduced graphics processing;
in response to receiving the first command, store context information in an external memory;
after said storing, disable clock signals for the graphics controller component;
after said storing, reduce a voltage applied to a graphics controller component of the memory controller, said reducing causing the voltage to be reduced below a voltage level required to maintain the context information in the graphics controller component;
after said reducing, detect issuance of a second command for said graphics controller component; and
in response to detecting issuance of the second command, increase the voltage applied to the graphics controller component, the increase causing the voltage to be increased to a voltage level required to support full operation of the graphics controller component.
6. The apparatus of claim 5 , wherein said power management controller is further operative to:
after the increase, enable the clock signals for said graphics controller component.
7. The apparatus of claim 6 , wherein said power management controller is further operative to:
after said enabling, transfer said context information from said external memory to said graphics controller component.
8. The apparatus of claim 5 , wherein said power management controller is further operative to:
enable the clock signals for said graphics controller component after detecting issuance of the second command and prior to said increasing.
9. A system comprising:
a memory controller; and
a graphics memory unit in communication with the memory controller;
wherein the memory controller includes a graphics controller component, and the memory controller also includes a power management controller for controlling a supply of power for at least a portion of the memory controller, the power management controller operative to:
receive a first command indicating that a processor has entered a process associated with reduced graphics processing;
in response to receiving the first command, store in an external memory context information;
after said storing, disable clock signals for said graphics controller component;
after said storing, reduce a voltage applied to the graphics controller component of the memory controller, said reducing causing the voltage to be reduced below a voltage level required to maintain the context information in the graphics controller component;
after said reducing, detect issuance of a second command for said graphics controller component; and
in response to detecting issuance of the second command, increase the voltage applied to the graphics controller component, said increasing causing the voltage to be increased to a voltage level required to support full operation of the graphics controller component.