IP Library Granted Patent US 9,905,748
Granted Patent B2
US 9,905,748 · App. 14/939,270 · Granted Feb 27, 2018

Vibrating device

Inventors: Toshio Nishimura (Nagaokakyo, JP); Keiichi Umeda (Nagaokakyo, JP); Takashi Hase (Nagaokakyo, JP); Keisuke Takeyama (Nagaokakyo, JP); Takehiko Kishi (Nagaokakyo, JP); Hiroshi Yamada (Nagaokakyo, JP)
Assignee: MURATA MANUFACTURING CO., LTD.
H01L41/09H01L41/047H01L41/083H03H9/02448H03H9/0595H03H9/2452H03H2009/155
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Quick Facts
Patent No.
US 9,905,748
App. No.
14/939,270
Granted
Feb 27, 2018
Kind
B2
Abstract

A vibrating device that is in the form of a rectangular plate having opposed long sides and opposed short sides, and that utilizes an expanding and contracting vibration mode in a direction of the short sides. The vibrating device includes a Si layer made of a degenerate semiconductor, a silicon oxide layer, a piezoelectric layer, and first and second electrodes through which a voltage is applied to the piezoelectric layer. When a total thickness of the Si layer is denoted by T 1 , a total thickness of the silicon oxide layer is denoted by T 2 , and the TCF in the vibrating device when the silicon oxide layer 3 is not provided is denoted by x(ppm/K), T 2 /(T 1 +T 2 ) is within a range of (−0.0003x 2 −0.0256x+0.0008)±0.05.

Claims (41)

1. A vibrating device comprising:

a rectangular body having opposed long sides and opposed short sides, and configured to exhibit expanding and contracting vibration in a direction of the short sides,

wherein the rectangular body includes:

a Si layer made of a degenerate semiconductor;

a silicon oxide layer;

a piezoelectric layer; and

first and second electrodes through which a voltage is applied to the piezoelectric layer, and

wherein when a total thickness of the Si layer is denoted by T 1 , a total thickness of the silicon oxide layer is denoted by T 2 , and a temperature coefficient of resonant frequency in the vibrating device when the silicon oxide layer is not provided is denoted by x, T 2 /(T 1 +T 2 ) is within a range of (−0.0003x 2 −0.0256x+0.0008)±0.05.

2. The vibrating device according to claim 1 , wherein the Si layer is doped with an n-type dopant.

3. The vibrating device according to claim 2 , wherein the dopant is phosphorus.

4. The vibrating device according to claim 1 , wherein the silicon oxide layer is on a first principal surface of the Si layer.

5. The vibrating device according to claim 1 , wherein the first electrode is disposed on a first principal surface of the piezoelectric layer, and the second electrode is disposed on a second principal surface of the piezoelectric layer opposite to the first principal surface.

6. The vibrating device according to claim 1 , wherein the Si layer is also the second electrode.

7. The vibrating device according to claim 4 , wherein the silicon oxide layer is a first silicon oxide layer, and the vibrating device further comprises a second silicon oxide layer on a second principal surface of the Si layer opposite the first principal surface.

8. A vibrating device comprising:

a square body configured to exhibit expanding and contracting vibration in a plane parallel to the square body,

wherein the vibrating device includes:

a Si layer made of a degenerate semiconductor;

a silicon oxide layer;

a piezoelectric layer; and

first and second electrodes through which a voltage is applied to the piezoelectric layer, and

wherein when a total thickness of the Si layer is denoted by T 1 , a total thickness of the silicon oxide layer is denoted by T 2 , and a temperature coefficient of resonant frequency in the vibrating device when the silicon oxide layer is not provided is denoted by x, T 2 /(T 1 +T 2 ) is within a range of (−0.0003x 2 −0.0228x+0.0024)±0.05.

9. The vibrating device according to claim 8 , wherein the Si layer is doped with an n-type dopant.

10. The vibrating device according to claim 9 , wherein the dopant is phosphorus.

11. The vibrating device according to claim 8 , wherein the silicon oxide layer is on a first principal surface of the Si layer.

12. The vibrating device according to claim 8 , wherein the first electrode is disposed on a first principal surface of the piezoelectric layer, and the second electrode is disposed on a second principal surface of the piezoelectric layer opposite to the first principal surface.

13. The vibrating device according to claim 8 , wherein the Si layer is also the second electrode.

14. The vibrating device according to claim 11 , wherein the silicon oxide layer is a first silicon oxide layer, and the vibrating device further comprises a second silicon oxide layer on a second principal surface of the Si layer opposite the first principal surface.

15. A vibrating device comprising:

a rectangular body having opposed long sides and opposed short sides, and configured to exhibit expanding and contracting vibration in a direction of the long sides,

wherein the vibrating device includes:

a Si layer made of a degenerate semiconductor;

a silicon oxide layer;

a piezoelectric layer; and

first and second electrodes through which a voltage is applied to the piezoelectric layer, and

wherein when a total thickness of the Si layer is denoted by T 1 , a total thickness of the silicon oxide layer is denoted by T 2 , and a temperature coefficient of resonant frequency in the vibrating device when the silicon oxide layer is not provided is denoted by x, T 2 /(T 1 +T 2 ) is within a range of (−0.0003x 2 −0.0250x+0.0215)±0.05.

16. The vibrating device according to claim 15 , wherein the Si layer is doped with an n-type dopant.

17. The vibrating device according to claim 16 , wherein the dopant is phosphorus.

18. The vibrating device according to claim 15 , wherein the silicon oxide layer is on a first principal surface of the Si layer.

19. The vibrating device according to claim 15 , wherein the first electrode is disposed on a first principal surface of the piezoelectric layer, and the second electrode is disposed on a second principal surface of the piezoelectric layer opposite the first principal surface.

20. The vibrating device according to claim 15 , wherein the Si layer is also the second electrode.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 12, 2015
From: NISHIMURA, TOSHIO; UMEDA, KEIICHI; HASE, TAKASHI; TAKEYAMA, KEISUKE; KISHI, TAKEHIKO; YAMADA, HIROSHI
To: MURATA MANUFACTURING CO., LTD.
Reel/Frame 037024/0688 →
Priority Claims (1)
JP 2013-101301 · May 13, 2013 · national
Continuity (2)
Continuation PCTJP2014062078 · May 1, 2014
Related Publication 20160064642A1 · Mar 3, 2016