Low-Resistance Interconnects and Methods of Making Same
Devices and methods for providing low-resistance interconnects in a semiconductor device are provided. Specifically, one or more embodiments of the present invention relate to disposing a conductive material in a trench without disposing a resistive barrier material between the conductive material and the sidewalls of the trench so that the conductive material takes up the full width of the trench. For example, the trench may be disposed over one or more contacts made of a barrier material such as titanium nitride that also acts as a seed, and the conductive material may be grown on top of the titanium nitride to fill the trench.
1 . A semiconductor device, comprising:
a metal plug;
a dual-damascene structure formed on top of the metal plug, wherein the dual-damascene structure comprises:
a horizontal component comprising a trench completely filled with a conductive material; and
a vertical component comprising a contact arranged between the horizontal component and the metal plug and configured to electrically couple the horizontal component to the metal plug.
2 . The semiconductor device of claim 1 , wherein the metal plug comprises tungsten.
3 . The semiconductor device of claim 1 , wherein the metal plug is electrically coupled to a semiconductor circuit component formed thereunder.
4 . The semiconductor device of claim 1 , wherein the contact is formed vertically through at least two dielectric layers.
5 . The semiconductor device of claim 1 , wherein the contact comprises a barrier material.
6 . The semiconductor device of claim 1 , wherein the contact is configured to act as a seed material for the conductive material in the overlying trench.
7 . The semiconductor device of claim 1 , wherein the contact comprises titanium nitride (TiN).
8 . The semiconductor device of claim 1 , wherein the contact comprises at least one of Tungsten Nitride (WN), Tantalum Nitride (TaN), Tantalum Silicon Nitride (TaSiN), or Titanium Aluminum Nitride (TiAlN).
9 . The semiconductor device of claim 1 , wherein the conductive material comprises tungsten.
10 . The semiconductor device of claim 1 , wherein the conductive material comprises poly-silicon.
11 . A semiconductor device, comprising:
a metal plug;
a dual-damascene structure formed on top of the metal plug and comprising:
a vertical component comprising a contact comprising a contact space completely filled with a barrier material; and
a dielectric material having a horizontal component formed therethrough, wherein horizontal component comprises a trench completely filled with a conductive material such that the conductive material is formed directly on the contact, wherein the barrier material acts as a seed for the conductive material.
12 . The semiconductor device of claim 11 , wherein the barrier material provides a barrier between the conductive material and a dielectric in which the contact was formed.
13 . The semiconductor device of claim 11 , wherein the contact is formed over a metal plug and the barrier material provides a barrier between the conductive material and the metal plug.
14 . The semiconductor device of claim 11 , wherein the barrier material comprises titanium nitride.
15 . The semiconductor device of claim 11 , wherein the conductive material comprises poly-silicon.
16 . The semiconductor of claim 15 , wherein the poly-silicon is metalized.
17 . The semiconductor device of claim 11 , wherein the width of the trench is less than approximately 35 nanometers.
18 . A semiconductor device comprising:
one or more metal plugs;
a dual-damascene structure formed on top of the one or more metal plugs, the dual-damascene structure comprising:
one or more vertical components comprising contacts electrically coupled to the one or more metal plugs, wherein the one or more vertical components comprise a barrier material; and
a horizontal component comprising a trench completely filled with a trench conductor disposed on and electrically coupled to the one or more vertical components.
19 . The semiconductor device of claim 18 , wherein the trench conductor comprises tungsten selectively deposited to a thickness that brings the top surface of the tungsten just below the top surface of the dual-damascene structure.
20 . The semiconductor device of claim 18 , wherein the barrier material comprises amorphous titanium nitride.
21 . The semiconductor device of claim 18 , wherein the trench conductor comprises poly-silicon doped with a conductive material.