Enhanced defect reduction for heteroepitaxy by seed shape engineering
View Patent ↗A heteroepitaxially grown structure includes a substrate and a mask including a high aspect ratio trench formed on the substrate. A cavity is formed in the substrate having a shape with one or more surfaces and including a resistive neck region at an opening to the trench. A heteroepitaxially grown material is formed on the substrate and includes a first region in or near the cavity and a second region outside the first region wherein the second region contains fewer defects than the first region.
1. A heteroepitaxially grown structure, comprising:
a substrate;
a mask formed on the substrate, including a high aspect ratio trench formed within the mask;
a cavity formed in the substrate having a shape with one or more surfaces and including a resistive neck region at an opening to the high aspect ratio trench;
a heteroepitaxially grown material formed on the substrate through the high aspect ratio trench; and
the heteroepitaxially grown material including a first region in or near the cavity and a second region outside the first region wherein the second region contains fewer defects than the first region.
2. The structure as recited in claim 1 , wherein the second region is defect free.
3. The structure as recited in claim 1 , wherein the one or more surfaces in the cavity face each other to direct defects to interact with each other.
4. The structure as recited in claim 1 , further comprising a buffer layer lining the one or more surfaces in the cavity.
5. The structure as recited in claim 1 , wherein the one or more surfaces in the cavity include a continuous surface.
6. The structure as recited in claim 1 , wherein the one or more surfaces constrain defects in four or more growth directions.
7. The structure as recited in claim 1 , wherein the heteroepitaxially grown material forms a portion of an electronic device.
8. The structure as recited in claim 1 , wherein the substrate includes an insulator.
9. The structure as recited in claim 1 , wherein the substrate includes a metal.
10. A heteroepitaxially grown structure, comprising:
a crystalline semiconductor substrate including a first material;
a dielectric layer formed on the substrate, including a high aspect ratio trench formed within the dielectric layer;
a cavity formed in the substrate having a shape with one or more surfaces and including a resistive neck region at an opening to the trench;
a heteroepitaxially grown material formed on the substrate through the high aspect ratio trench;
the heteroepitaxially grown material including a first region in or near the cavity and a second region outside the first region wherein the first region contains defects and the second region includes fewer defects than the first region; and
an electronic device formed in the first region of the heteroepitaxially grown material.
11. The structure as recited in claim 10 , wherein the one or more surfaces in the cavity face each other to direct defects to interact with each other.
12. The structure as recited in claim 10 , further comprising a buffer layer lining the one or more surfaces in the cavity.
13. The structure as recited in claim 10 , wherein the one or more surfaces in the cavity include a continuous surface.
14. The structure as recited in claim 10 , wherein the one or more surfaces constrain defects in four or more growth directions.
15. A method for heteroepitaxially growing a material, comprising:
forming a mask layer on a substrate;
etching a high aspect ratio trench in the mask layer;
etching a cavity in the substrate through the trench to form a shape with one or more surfaces to direct defect into one another on multiple growth fronts and including a resistive neck region at an opening to the trench; and
heteroepitaxially growing a crystal material on the substrate through the high aspect ratio trench where a first region in or near the cavity contains defects and a second region outside the first region includes fewer defects than the first region.
16. The method as recited in claim 15 , wherein the one or more surfaces in the cavity face each other to direct defects to interact with each other.
17. The method as recited in claim 15 , further comprising forming a buffer layer to line the one or more surfaces in the cavity.
18. The method as recited in claim 15 , wherein the one or more surfaces in the cavity include a continuous surface.
19. The method as recited in claim 15 , wherein the one or more surfaces constrain defects in four or more growth directions.
20. The method as recited in claim 15 , wherein heteroepitaxially growing the crystal material further includes forming a portion of an electronic device with heteroepitaxially grown material.