High performance portable convulational neural network library on GP-GPUs
Systems and methods are disclosed for speeding up a computer having a graphics processing unit (GPU) and a general purpose processor (GP-GPU) by decoupling a convolution process for a first matrix into a row part and a column part; expanding the row part into a second matrix; performing matrix multiplication using the second matrix and a filter matrix; and performing reduction on an output matrix.
1. A method for speeding up a computer having a graphics processing unit (GPU) and a general purpose processor (GP-GPU), comprising:
decoupling a filter for a first matrix into a row part and a column part;
expanding the first matrix to create a second matrix and inserting the row part into the second matrix;
performing matrix multiplication using the second matrix and a filter matrix using the GPU; and
reducing the size of an output matrix.
2. The method of claim 1 , comprising using an optimized matrix multiplication.
3. The method of claim 1 , comprising perfomiing matrix expansion.
4. The method of claim 1 , comprising for an input matrix, expanding each pixel of the matrix to a vector whose size is the size of x dimensions of the filter.
5. The method of claim 1 , comprising applying a matrix multiplication on the filter matrix and the second matrix.
6. The method of claim 1 , comprising applying a reduction on pixels whose number is the size of y dimensions the filter to generate one final pixel.
7. The method of claim 1 , for a matrix whose size is M×K and another matrix whose size is K×N, comprising exploring parallelism in B dimension.
8. The method of claim 1 , comprising partitioning the matrix into a number of small matrix multiplications.
9. The method of claim 8 , comprising wherein the number of small matrix multiplications is P. Then each small matrix multiplication has the size M×K/P with K/P×N without decreasing the values of M and N.
10. The method of claim 1 , comprising providing runtime auto-tuning for a specific input.
11. The method of claim 1 , comprising runtime profiling to predict implementation performance.
12. The method of claim 1 , comprising applying nested parallelism to improve matrix multiplication.
13. The method of claim 1 , for a matrix whose size is M×K and another matrix whose size is K×N, comprising applying parallelism in B dimension.
14. The method of claim 1 , wherein the second matrix larger than the first matrix.
15. A computer system, comprising:
a graphics processing unit (GPU) and a general purpose processor (GP-GPU);
code for decoupling a filter for a first matrix into a row part and a column part;
code for first matrix to create a second matrix and inserting the row part into the second matrix;
code for perfoiiiiing matrix multiplication using the second matrix and a filter matrix using the GPU; and
code for reducing the size of an output matrix.
16. The system of claim 15 , comprising code for using an optimized matrix multiplication.
17. The system of claim 15 , comprising code for performing matrix expansion.
18. The system of claim 17 , comprising code for expanding each pixel of the matrix to a vector whose size is the size of x dimensions of the filter.