IP Library Granted Patent US 9,935,591
Granted Patent B2
US 9,935,591 · App. 14/948,052 · Granted Apr 3, 2018

Method and apparatus for current steering in high sensitivity, high linearity and large dynamic range high speed trans-impedance amplifiers

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Quick Facts
Patent No.
US 9,935,591
App. No.
14/948,052
Granted
Apr 3, 2018
Kind
B2
Abstract

The present invention relates to a linear, high sensitivity, high speed trans-impedance amplifier (TIA) which allows a large dynamic range of input current up to very large values, maintains high linearity and keeps constant output voltage, maintains the same frequency response across the full gain control range, provides very high input sensitivity and large bandwidth, and allows input current monitoring without affecting input sensitivity. In other words, the novel circuit disclosed herein provides for the feedback path to maintain the same level of feedback even while the output signal is varied. This allows a wide and stable bandwidth, as well as a monitor to be placed in the TIA.

Claims (63)

1. An apparatus comprising:

a core trans-impedance amplifier (TIA), wherein the core TIA includes:

an input for receiving an input signal;

gain control circuitry;

feedback loop circuitry;

an output for outputting an output signal;

a second stage amplifier configured to receive the output signal of the core TIA and further configured to output a second stage amplifier output signal; and

an output buffer configured to receive the second stage amplifier output signal,

wherein the gain control circuitry is configured to receive and perform gain control on the input signal by steering current in at least one of a first direction and a second direction using one or more electrical components, and

wherein the feedback loop circuitry is arranged between the gain control circuitry and the input, and is configured to maintain constant feedback voltage of the core TIA.

2. The apparatus of claim 1 , wherein the second stage amplifier is a fixed gain amplifier and has constant gain.

3. The apparatus of claim 1 , wherein the output buffer has constant gain.

4. An apparatus comprising:

a core trans-impedance amplifier (TIA), wherein the core TIA includes:

an input for receiving an input signal;

gain control circuitry;

feedback loop circuitry; and

an output for outputting an output signal,

wherein the gain control circuitry is configured to receive and perform gain control on the input signal by steering current in at least one of a first direction and a second direction using one or more electrical components, wherein the one or more electrical components includes a transistor,

wherein the current is steered using at least one of the first transistor and the second transistor, and

wherein the feedback loop circuitry is arranged between the gain control circuitry and the input, and is configured to maintain constant feedback voltage of the core TIA.

5. An apparatus comprising:

a core trans-impedance amplifier (TIA), wherein the core TIA includes:

an input for receiving an input signal;

gain control circuitry;

feedback loop circuitry; and

an output for outputting an output signal,

wherein the gain control circuitry is configured to receive and perform gain control on the input signal by steering current in at least one of a first direction and a second direction using one or more electrical components,

wherein the feedback loop circuitry is arranged between the gain control circuitry and the input, and is configured to maintain constant feedback voltage of the core TIA, and

wherein the first direction is toward a supply source and the second direction is toward a signal output.

6. An apparatus comprising:

a core trans-impedance amplifier (TIA), wherein the core TIA includes:

an input for receiving an input signal;

gain control circuitry;

feedback loop circuitry; and

an output for outputting an output signal,

wherein the gain control circuitry is configured to receive and perform gain control on the input signal by steering current in at least one of a first direction and a second direction using one or more electrical components,

wherein the one or more electrical components includes a transistor,

wherein the feedback loop circuitry is arranged between the gain control circuitry and the input, and is configured to maintain constant feedback voltage of the core TIA, and

wherein the transistor has low impedance and allows for input of current.

7. The apparatus of claim 4 , wherein the first transistor is configured to steer more current than the second transistor.

8. An apparatus comprising:

a core trans-impedance amplifier (TIA), wherein the core TIA includes:

an input for receiving an input signal;

gain control circuitry;

feedback loop circuitry;

an output for outputting an output signal; and

an input current monitoring point,

wherein the gain control circuitry is configured to receive and perform gain control on the input signal by steering current in at least one of a first direction and a second direction using one or more electrical components, and

wherein the feedback loop circuitry is arranged between the gain control circuitry and the input, and is configured to maintain constant feedback voltage of the core TIA

wherein the input current monitoring point allows an application using the apparatus to align one or more optical fibers to one or more sensors emitting the input signal into the input of the core TIA.

9. The apparatus of claim 8 , wherein the input current monitoring point is included in the feedback loop circuitry.

10. The apparatus of claim 1 wherein the feedback loop circuitry includes at least one of a transistor and a resistor.

11. The apparatus of claim 1 , wherein the apparatus is a TIA.

12. The apparatus of claim 11 , wherein the TIA is included in a multi-channel TIA configuration and is a first channel among a plurality of channels.

13. A method implemented in a core trans-impedance amplifier (TIA), the method comprising the acts of:

receiving an input signal via an input of the core TIA;

receiving the input signal via gain control circuitry configured in the core TIA;

performing gain control on the input signal via the gain control circuitry by steering current in at least one of a first direction and a second direction using one or more electrical components;

maintaining constant feedback voltage of the core TIA using feedback loop circuitry configured in the core TIA; and

outputting an output signal via an output of the core TIA.

wherein the current is steered using at least one of a first transistor and a second transistor.

14. The method of claim 13 , wherein the first direction is toward a supply source and the second direction is toward a signal output.

Assignments (5)
RELEASE OF SECURITY INTEREST Recorded Mar 29, 2019
From: JPMORGAN CHASE BANK, N.A.
To: INTEGRATED DEVICE TECHNOLOGY, INC.; GIGPEAK, INC.; CHIPX, INCORPORATED; ENDWAVE CORPORATION; MAGNUM SEMICONDUCTOR, INC.
Reel/Frame 048746/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 4, 2017
From: GIGPEAK, INC.
To: INTEGRATED DEVICE TECHNOLOGY, INC.
Reel/Frame 043207/0576 →
SECURITY AGREEMENT Recorded Apr 5, 2017
From: INTEGRATED DEVICE TECHNOLOGY, INC.; GIGPEAK, INC.; MAGNUM SEMICONDUCTOR, INC.; ENDWAVE CORPORATION; CHIPX, INCORPORATED
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 042166/0431 →
CHANGE OF NAME Recorded Feb 9, 2017
From: GIGOPTIX, INC.
To: GIGPEAK, INC.
Reel/Frame 041217/0342 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 20, 2015
From: SHAW, MICHAEL
To: GIGOPTIX, INC.
Reel/Frame 037107/0145 →