Stacked nanowire semiconductor device
A semiconductor device a first epitaxially grown source/drain region comprising a first material arranged on a first fin, a second epitaxially grown source/drain region comprising the first material arranged on the second fin, the second epitaxially grown source/drain region arranged above the first epitaxially grown source/drain region, a third epitaxially grown source/drain region comprising the first material arranged on a second fin, a fourth epitaxially grown source/drain region comprising a second material arranged on the second fin, the fourth epitaxially grown source/drain region arranged above the third epitaxially grown source/drain region, and a gate stack arranged over a channel region of the first fin and a channel region of the second fin.
1. A semiconductor device comprising:
a first epitaxially grown source/drain region comprising a first material arranged on a first fin;
a second epitaxially grown source/drain region comprising the first material arranged on the first fin, the second epitaxially grown source/drain region arranged above the first epitaxially grown source/drain region;
a third epitaxially grown source/drain region comprising the first material arranged on a second fin;
a fourth epitaxially grown source/drain region comprising a second material arranged on the second fin, the fourth epitaxially grown source/drain region arranged above the third epitaxially grown source/drain region; and
a gate stack arranged over a channel region of the first fin and a channel region of the second fin.
2. The device of claim 1 , wherein the first material includes n-type dopants and the second material includes p-type dopants.
3. The device of claim 1 , wherein the first fin includes:
a first semiconductor region;
an insulator region arranged on the first semiconductor region; and
a second semiconductor region arranged on the insulator region.
4. The device of claim 1 , wherein the second fin includes:
a first semiconductor region;
an insulator region arranged on the first semiconductor region; and
a second semiconductor region arranged on the insulator region.
5. The device of claim 3 , wherein the first epitaxially grown source/drain region is arranged on the first semiconductor region of the first fin and the second epitaxially grown source/drain region is arranged on the second semiconductor region of the first fin.
6. The device of claim 4 , wherein the third epitaxially grown source/drain region is arranged on the first semiconductor region of the second fin and the fourth epitaxially grown source/drain region is arranged on the second semiconductor region of the second fin.
7. The device of claim 1 wherein the first material is dissimilar from second material.