IP Library Granted Patent US 9,627,263
Granted Patent B1
US 9,627,263 · App. 14/953,461 · Granted Apr 18, 2017

Stop layer through ion implantation for etch stop

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Quick Facts
Patent No.
US 9,627,263
App. No.
14/953,461
Granted
Apr 18, 2017
Kind
B1
Abstract

A process for etching a bulk integrated circuit substrate to form features on the substrate, such as fins, having substantially vertical walls comprises forming an etch stop layer beneath the surface of the substrate by ion implantation, e.g., carbon, oxygen, or boron ions or combinations thereof, masking the surface with a patterned etching mask that defines the features by openings in the mask to produce a masked substrate and etching the masked substrate to a level of the etch stop layer to form the features. In silicon substrates, ion implantation takes place along a silicon crystalline lattice beneath the surface of the substrate. The etchant comprises a halogen material that etches undoped silicon faster than the implants-rich silicon layer. This produces a circuit where the fins do not taper away from the vertical where they meet the substrate, and corresponding products and articles of manufacture having these features.

Claims (6)

1. A process for etching a bulk integrated circuit substrate to form features comprising a vertical wall configuration on said substrate comprising forming an etch stop layer beneath the surface of said substrate by ion implantation, masking said surface with a patterned etching mask that defines said features by openings in said mask to produce a masked substrate, and etching said masked substrate to a level of said etch stop layer to form said features; wherein said features comprises fins on said substrate, said substrate comprises an undoped silicon substrate so that said process produces an undoped silicon layer on an implants-rich silicon layer which in turn is positioned on a silicon layer, and said fins do not taper away from said vertical configuration where they meet said substrate; and wherein said implants are formed along a silicon crystalline lattice beneath the surface of said substrate.

2. The process of claim 1 wherein said etching is conducted with a halogen etchant that etches undoped silicon faster than said implants-rich silicon layer.

3. The process of claim 1 wherein said etchant comprises one of chlorine, hydrogen bromide or hydrogen iodide gasses and combinations thereof.

4. A product made by the process of claim 1 .

5. A product made by the process of claim 2 .

6. A product made by the process of claim 3 .

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 11, 2020
From: INTERNATIONAL BUSINESS MACHINES CORPORATION
To: ELPIS TECHNOLOGIES INC.
Reel/Frame 052620/0961 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 27, 2016
From: HE, HONG; KANAKASABAPATHY, SIVA; YIN, YUNPENG; TSENG, CHIAHSUN; WANG, JUNLI
To: INTERNATIONAL BUSINESS MACHINES CORPORATION
Reel/Frame 038391/0022 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 21, 2016
From: KANAKASABAPATHY, SIVA; YIN, YUNPENG; WANG, JUNLI
To: INTERNATIONAL BUSINESS MACHINES CORORATION
Reel/Frame 038346/0819 →