Lid attach optimization to limit electronic package warpage
An electronic package includes a carrier and a semiconductor chip. In a first aspect a lid is attached to the chip and subsequently the gap between the lid and the carrier is filled by a seal band that includes seal band material and a plurality of shim members. In another aspect, an interleaved seal band includes a pattern of a first type of seal band material and a second type of seal band material. In another aspect, the lid includes a plurality of surfaces at different topographies to reduce the thickness of the seal band between the topographic lid and the carrier. In yet another aspect the electronic package further includes a frame concentric with the chip. The lid is attached to the frame with a solder, epoxy or elastomer and placed on the chip with a thermal interface material. The seal band material is dispensed on the chip carrier and the frame is then moved towards the chip carrier allowing a minimum seal band thickness.
1. A method to fabricate an electronic package comprising:
electronically connecting a semiconductor chip to a carrier;
forming a gap between a perimeter bottom surface of a lid and the carrier as a result of thermally connecting the lid to the semiconductor chip;
subsequent to thermally connecting the lid to the semiconductor chip, forming a first seal band upon the carrier concentric with the semiconductor chip in the gap between the perimeter bottom surface of the lid and the carrier; and
subsequent to forming the first seal band, inserting a plurality of shim members upon the first seal band in the gap between the perimeter bottom surface of the lid and the carrier.
2. The method of claim 1 , further comprising:
applying a second seal band upon the plurality of shim members filling the gap between the perimeter bottom surface of the lid and the carrier.
3. The method of claim 1 , wherein a seal-band material of the first seal band and the second seal band is an elastomeric material.