IP Library Granted Patent US 9,761,455
Granted Patent B2
US 9,761,455 · App. 14/969,708 · Granted Sep 12, 2017

Material removal process for self-aligned contacts

Inventors: Sivananda K. Kanakasabapathy (Niskayuna, NY); Ahmet S. Ozcan (Chappaqua, NY)
Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
H01L21/2633H01J37/304H01J37/3005H01L22/12H01L21/76224H01L29/66795H01L29/785
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Quick Facts
Patent No.
US 9,761,455
App. No.
14/969,708
Granted
Sep 12, 2017
Kind
B2
Abstract

A method is disclosed of removing a first material disposed over a second material adjacent to a field effect transistor gate having a gate sidewall layer that comprises an etch-resistant material on a gate sidewall. The method includes subjecting the first material to a gas cluster ion beam etch process to remove first material adjacent to the gate, and detecting exposure of the second material during the gas cluster ion beam (GCIB) etch process.

Claims (27)

1. A method for fabricating a semiconductor device, the method comprising:

subjecting a first material to a gas cluster ion beam etch process to remove the first material, the first material disposed over a second material and adjacent to a field effect transistor gate comprising a gate sidewall layer that comprises an etch-resistant material on a gate sidewall;

detecting exposure of the second material during the gas cluster ion beam etch process; and

determining an amount of time required for the gas cluster ion beam etch to remove the first material and expose the second material based on said detecting exposure of the second material.

2. The method of claim 1 , further comprising terminating the gas cluster ion beam etch process in response to detecting exposure of the second material.

3. The method of claim 1 , wherein the first material subjected to the gas cluster ion beam etch is disposed between adjacent field effect transistor gates comprising sidewall spacer layers.

4. The method of claim 1 , wherein the first material comprises a dielectric material.

5. The method of claim 1 , wherein the first material comprises a layer of said etch-resistant material.

6. The method of claim 1 , wherein the second material comprises a source or drain of the field effect transistor.

7. The method of claim 1 , further comprising subjecting the first material or another material adjacent to the gate sidewall to an etch process other than gas cluster ion beam etching.

8. The method of claim 1 , wherein detecting exposure of the second material comprises optical detection of the second material or sensing removal of the second material by the gas cluster ion beam etch process.

9. The method of claim 8 , wherein detecting exposure of the second material comprises sensing removal of the second material by spectroscopy.

10. The method of claim 1 , wherein the gate is disposed on a wafer comprising one or more additional of gates having said first and second materials adjacent thereto.

11. A method for fabricating a semiconductor device, the method comprising:

subjecting a first material to a gas cluster ion beam etch process to remove the first material, the first material disposed over a second material and adjacent to a field effect transistor gate comprising a gate sidewall layer that comprises an etch-resistant material on a gate sidewall; and

detecting exposure of the second material during the gas cluster ion beam etch process,

wherein the gas cluster ion beam etch process is performed by a gas cluster ion beam etch apparatus that includes a sensor for detecting exposure of the second material.

12. The method of claim 11 , wherein the gas cluster ion beam etch process is performed at a pressure 10 −5 torr to 10 −3 torr, and the gas cluster ion beam etch apparatus includes a conduit maintained at a pressure of 10 −10 torr to 5×10 −4 torr maintained by differential pumping for sampling gas from an etch target site.

13. The method of claim 11 , further comprising determining an amount of time required for the gas cluster ion beam etch to remove the first material and expose the second material based on said detecting exposure of the second material.

14. A method for fabricating a semiconductor device, the method comprising:

subjecting a first material to a gas cluster ion beam etch process to remove the first material, the first material disposed over a second material and adjacent to a field effect transistor gate comprising a gate sidewall layer that comprises an etch-resistant material on a gate sidewall, and the gate disposed on a wafer comprising one or more additional of gates having said first and second materials adjacent thereto;

detecting exposure of the second material during the gas cluster ion beam etch process;

determining an amount of time required for the gas cluster ion beam etch to remove the first material and expose the second material based on said detecting exposure of the second material;

subjecting the first material adjacent to the additional gate or gates to the gas cluster ion beam etch process to remove first material adjacent to the additional gate or gates for a duration equal to said amount of time; and

terminating the gas cluster ion beam etch process performed on the first material adjacent to the additional gate or gates upon completion of said duration without actively detecting exposure of the second material adjacent at one or more of the additional gate or gates.

15. The method of claim 14 , wherein the gas cluster ion beam etch process for removal of the first material adjacent to the additional gate or gates is terminated.

16. The method of claim 15 , wherein detecting exposure of the second material comprises collecting gas proximate to a point of intersection between the gas cluster ion beam and the wafer, and the method further comprises positioning a gas collector proximate to the point of intersection during detection of exposure of the second material, and repositioning the gas collector to a position remote from the point of intersection during gas cluster ion beam etching of the first material adjacent to the additional gate or gates.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 4, 2020
From: INTERNATIONAL BUSINESS MACHINES CORPORATION
To: ELPIS TECHNOLOGIES INC.
Reel/Frame 052561/0161 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 15, 2015
From: KANAKASABAPATHY, SIVANANDA K.; OZCAN, AHMET S.
To: INTERNATIONAL BUSINESS MACHINES CORPORATION
Reel/Frame 037295/0697 →
Continuity (1)
Related Publication 20170170019A1 · Jun 15, 2017