IP Library Granted Patent US 9,594,520
Granted Patent B2
US 9,594,520 · App. 14/976,574 · Granted Mar 14, 2017

Atomic write command support in a solid state drive

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Quick Facts
Patent No.
US 9,594,520
App. No.
14/976,574
Granted
Mar 14, 2017
Kind
B2
Abstract

A method of performing an atomic write command in a data storage device comprising a volatile memory and a plurality of non-volatile memory devices configured to store a plurality of physical pages. The method may comprise storing data in a plurality of logical pages (L-Pages), each associated with a logical address. A logical-to-physical address translation map may be maintained in the volatile memory, and may be configured to enable determination of a physical location, within one or more of the physical pages, of the data referenced by each logical address. The data specified by a received atomic write command may be stored one or more L-Pages. Updates to the entry or entries in the translation map associated with the L-Page(s) storing the data specified by the atomic write command may be deferred until all L-Pages storing data specified by the atomic write command have been written in a power-safe manner.

Claims (35)

1. A method of performing an atomic write command in a data storage device comprising a volatile memory and a plurality of non-volatile memory devices that are configured to store a plurality of physical pages, the method comprising:

storing data in a plurality of logical pages (L-Pages), each of the plurality of L-Pages being associated with a logical address;

maintaining a logical-to-physical address translation map in the volatile memory, the translation map being configured to enable determination of a physical location, within one or more of the physical pages, of the data referenced by each logical address;

receiving the atomic write command;

storing data specified by the atomic write command in at least one L-Page;

storing information tracking a range of L-Pages in which the writing of at least some L-Pages specified by the atomic write command have been completed, wherein the written L-pages can be written out of order;

in the event the atomic write command does not complete, at reconstruction:

using the stored tracking information to generate a copy command that copies a current version of L-Pages within the range that existed before the atomic write command; and

deferring an update to at least one entry in the translation map associated with the at least one L-Page storing the data specified by the atomic write command until all L-Pages storing data specified by the atomic write command have been written in a power-safe manner.

2. The method of claim 1 , comprising:

associating L-Pages of the atomic write command with a unique sequence number.

3. The method of claim 2 , wherein storing information tracking a range of L-Pages comprises:

updating a table that stores atomic write commands by their unique sequence numbers, wherein the table associates a minimum and a maximum value for each atomic write command;

finding in the table the unique sequence number of an L-page written by the atomic write command;

comparing a number associated with the L-page to the minimum and maximum value associated with the unique sequence number;

updating the minimum value with the number associated with the L-page if the number is less than the minimum value; and

updating the maximum value with the number associated with the L-page if the number is greater than the maximum value.

4. A data storage device controller, comprising:

a processor, the processor being configured to perform an atomic write command in a data storage device comprising a volatile memory and a plurality of non-volatile memory devices that are configured to store a plurality of physical pages, by at least:

storing data in a plurality of logical pages (L-Pages), each of the plurality of L-Pages being associated with a logical address;

maintaining a logical-to-physical address translation map in the volatile memory, the translation map being configured to enable determination of a physical location, within one or more of the physical pages, of the data referenced by each logical address;

receiving the atomic write command;

storing data specified by the atomic write command in at least one L-Page; and

storing information tracking a range of L-Pages in which the writing of at least some L-Pages specified by the atomic write command have been completed, wherein the written L-pages can be written out of order;

in the event the atomic write command does not complete, at reconstruction:

using the stored tracking information to generate a copy command that copies a current version of L-Pages within the range that existed before the atomic write command; and

deferring an update to at least one entry in the translation map associated with the at least one L-Page storing the data specified by the atomic write command until all L-Pages storing data specified by the atomic write command have been written in a power-safe manner.

5. The data storage device controller of claim 4 , wherein the processor is configured to:

associate L-Pages of the atomic write command with a unique sequence number.

6. The data storage device controller of claim 5 , wherein the storing information tracking a range of L-Pages comprises:

updating a table that stores atomic write commands by their unique sequence numbers, wherein the table associates a minimum and a maximum value for each atomic write command;

finding in the table the unique sequence number of an L-page written by the atomic write command;

comparing a number associated with the L-page to the minimum and maximum value associated with the unique sequence number;

updating the minimum value with the number associated with the L-page if the number is less than the minimum value; and

updating the maximum value with the number associated with the L-page if the number is greater than the maximum value.

Assignments (7)
CHANGE OF NAME Recorded Jun 27, 2024
From: SANDISK TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067982/0032 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 29, 2024
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067567/0682 →
PATENT COLLATERAL AGREEMENT - A&R LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 064715/0001 →
PATENT COLLATERAL AGREEMENT - DDTL LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 067045/0156 →
RELEASE OF SECURITY INTEREST AT REEL 052915 FRAME 0566 Recorded Feb 8, 2022
From: JPMORGAN CHASE BANK, N.A.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 059127/0001 →
SECURITY INTEREST Recorded Feb 6, 2020
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS AGENT
Reel/Frame 052915/0566 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 29, 2018
From: SKYERA, LLC
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 046726/0328 →