IP Library Granted Patent US 9,733,273
Granted Patent B2
US 9,733,273 · App. 14/979,366 · Granted Aug 15, 2017

Testing method for semiconductor manufacturing equipment

Inventor: Yusuke Nakajima (Takasaki, JP)
Assignee: RENESAS SEMICONDUCTOR PACKAGE & TEST SOLUTIONS CO., LTD.
G01R1/07314G01R31/02G01R31/2808
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Quick Facts
Patent No.
US 9,733,273
App. No.
14/979,366
Granted
Aug 15, 2017
Kind
B2
Abstract

The time required to test an electronic device mounted in semiconductor manufacturing equipment can be reduced. A first test panel mounted, on a first connector surface thereof, with plural first test-object connectors respectively including plural first terminals electrically coupled to an electronic device and a second test panel mounted, on a second connector surface thereof, with plural second test-object connectors respectively including plural spring probes are provided. The first connector surface of the first test panel and the second connector surface of the second test panel are positioned to face each other, the spring probes included in the second test-object connectors are electrically coupled to the first terminals included in the first test-object connectors, and a functional test concerning an electrical characteristic of the electronic device is performed.

Claims (20)

1. A testing method for semiconductor manufacturing equipment comprising the steps of:

(a) providing a first test panel which includes a first connector surface and a plurality of first test-object connectors mounted over the first connector surface, each of the plurality of first test object connectors having a terminal electrically coupled with an object to be tested,

(b) providing a second test panel which includes a second connector surface and a plurality of second test-object connectors mounted over the second connector surface, each of the plurality of second test object connectors having a probe that is extensible and retractable in a direction from the second connector surface of the second test panel toward the first connector surface of the first test panel, and

(c) testing an electrical characteristic of the object to be tested by, in a state with the first connector surface of the first test panel and the second connector surface of the second test panel facing each other, coupling the probes of the second test-object connectors to respective terminals of the first test-object connectors,

wherein the distances between the first connector surface of the first test panel and the terminals respectively included in the first test-object connectors are not uniform.

2. The testing method for semiconductor manufacturing equipment according to claim 1 , wherein the distances between the second connector surface of the second test panel and respective tips of the probes are uniform in the second test-object connectors.

3. The testing method for semiconductor manufacturing equipment according to claim 1 ,

wherein the terminals respectively included in the first test-object connectors each include:

a first group of terminals having a first distance from the first connector surface of the first test panel; and

a second group of terminals having a second distance shorter than the first distance from the first connector surface of the first test panel,

wherein the probes respectively included in the second test-object connectors each include:

a first group of probes facing the first group of terminals; and

a second group of probes facing the second group of terminals, and

wherein, after respective tips of the first group of probes contact the first group of terminals, respective tips of the second group of probes contact the second group of terminals.

4. The testing method for semiconductor manufacturing equipment according to claim 3 , wherein a relationship of L 1 ≧L 2 is kept, L 1 representing the distance, in a state with neither the tips of the first group of probes contacting the first group of terminals nor the tips of the second group of probes contacting the second group of terminals, between the tips of the probes respectively projecting from the second test-object connectors and the second test-object connectors, L 2 representing the distance, when the tips of the second group of probes contact the second group of terminals after the first group of terminals are contacted by the tips of the first group of probes causing the first group of probes to be immovable, between the tips of the probes respectively projecting from the second test-object connectors and the second test-object connectors.

5. The testing method for semiconductor manufacturing equipment according to claim 1 , further comprising the step of:

fixing the second test panel to the first test panel by coupling a fixing mechanism of the second test panel to an outer portion of the first test panel.

6. The testing method for semiconductor manufacturing equipment according to claim 1 , wherein the second test panel has markings provided on a surface thereof which, not facing the first connector surface of the first test panel, is opposite to the second connector surface of the second test panel, the markings identifying the terminals included in the first test-object connectors.

7. The testing method for semiconductor manufacturing equipment according to claim 1 , wherein the tips of the probes are conical.

8. The testing method for semiconductor manufacturing equipment according to claim 1 , wherein the probes each have an end face including a plurality of projections to cause the end face of each of the probes to be coupled to a corresponding one of the terminals via a plurality of contact points.

Assignments (5)
CHANGE OF ADDRESS Recorded Feb 28, 2022
From: MAXELL FRONTIER CO., LTD.
To: MAXELL FRONTIER CO., LTD.
Reel/Frame 059252/0983 →
MERGER AND CHANGE OF NAME Recorded Oct 14, 2020
From: MAXELL SYSTEM TECH CO., LTD.; MAXELL FRONTIER CO., LTD.
To: MAXELL FRONTIER CO., LTD.
Reel/Frame 054075/0203 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 25, 2017
From: RENESAS SEMICONDUCTOR PACKAGE & TEST SOLUTIONS CO., LTD.
To: MAXELL SYSTEM TECH CO., LTD.
Reel/Frame 043941/0174 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 3, 2017
From: RENESAS ELECTRONICS CORPORATION
To: RENESAS SEMICONDUCTOR PACKAGE & TEST SOLUTIONS CO., LTD.
Reel/Frame 041454/0863 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 17, 2017
From: NAKAJIMA, YUSUKE
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 041287/0165 →
Priority Claims (1)
JP 2015-003527 · Jan 9, 2015 · national
Continuity (1)
Related Publication 20160202293A1 · Jul 14, 2016