Method for depositing a layer on a semiconductor wafer by vapor deposition in a process chamber
View Patent ↗A method for depositing a layer on a semiconductor wafer by vapor deposition in a process chamber, involves removing native oxide from a surface of the wafer; and then depositing an epitaxial layer with a thickness of at least 40 μm on the surface of the wafer by introducing a silicon containing gas and a carrier gas into the process chamber, wherein the flow rate of the silicon containing gas is lower than 10 standard liters per minute and the flow rate of the carrier gas is at least 40 standard liters per minute.
1. A method for depositing a layer on a semiconductor wafer by vapor deposition in a process chamber, the method comprising:
removing native oxide from a surface of the semiconductor wafer; and then
depositing an epitaxial layer with a thickness in a range of from 50 to 150 μm on the surface of the semiconductor wafer, by a process comprising introducing a silicon-comprising gas and a carrier gas comprising H 2 into the process chamber,
wherein the surface of the semiconductor wafer has a temperature of at least 1050° C. during the depositing;
wherein a silicon-comprising gas flow rate is in a range from at least 5 to lower than 10 standard liters per minute, and
wherein a carrier gas flow rate is at least 40 standard liters per minute.
2. The method of claim 1 , wherein the silicon-comprising gas flow rate is at 5 to 8 standard liters per minute, and
wherein the carrier gas flow rate is more than 50 standard liters per minute.
3. The method of claim 2 , further comprising:
adjusting a temperature in the process chamber to between 1050° C. and 1150° C. during the depositing of the epitaxial layer.
4. The method of claim 1 , further comprising:
adjusting a temperature in the process chamber to between 1050° C. and 1150° C. during the depositing of the epitaxial layer.
5. The method of claim 1 , further comprising:
etching the semiconductor wafer before the depositing of the epitaxial layer.
6. The method of claim 1 , wherein the epitaxial layer has a thickness in a range of from 60 to 150 μm.
7. The method of claim 1 , wherein the epitaxial layer has a thickness in a range of from 60 to 100 μm.
8. The method of claim 1 , wherein the surface of the semiconductor wafer has a temperature of at least 1100° C. during the depositing.
9. The method of claim 1 , which produces a semiconductor wafer, comprising:
the epitaxial layer having a thickness of 40 μm to 150 μm;
slip lines of less than 15 mm; and
a flatness SFQRmax (25×25 mm pattern) of not more than 0.8 μm.
10. The method of claim 9 , wherein the semiconductor wafer has not more than 6 LLS defects≥0.2 μm and not more than 4 LLS defects≥0.3 μm.
11. The method of claim 1 , wherein the epitaxial layer has a thickness in a range of from 100 to 150 μm.
12. The method of claim 1 , wherein the epitaxial layer has a thickness in a range of from 50 to 60 μm.
13. The method of claim 1 , wherein the carrier gas flow rate is greater than 40 standard liters per minute.
14. The method of claim 1 , wherein the carrier gas flow rate is up to 60 standard liters per minute.
15. The method of claim 1 , wherein the carrier gas flow rate is greater than 55 standard liters per minute.
16. The method of claim 15 , wherein the carrier gas flow rate is up to 60 standard liters per minute.