IP Library › Granted Patent US 10,068,372
Granted Patent B2
US 10,068,372 · App. 14/984,896 · Granted Sep 4, 2018

Method and apparatus for performing high throughput tessellation

Inventors: Timour T. Paltashev (Sunnyvale, CA); Boris Prokopenko (Sunnyvale, CA); Vladimir V. Kibardin (Sunnyvale, CA)
Assignee: Advanced Micro Devices, Inc.
G06T17/20G06T1/20G06T15/005
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Quick Facts
Patent No.
US 10,068,372
App. No.
14/984,896
Granted
Sep 4, 2018
Kind
B2
Abstract

A method, a system, and a computer-readable storage medium directed to performing high-speed parallel tessellation of 3D surface patches are disclosed. The method includes generating a plurality of primitives in parallel. Each primitive in the plurality is generated by a sequence of functional blocks, in which each sequence acts independently of all the other sequences.

Claims (36)

1. A method for performing high-speed tessellation, comprising:

determining, from tessellation factors, a number of vertices and a number of primitives for tessellation of a three-dimensional surface patch;

providing at least the number of vertices and the number of primitives to a plurality of sequences of functional blocks;

generating, for the three-dimensional surface patch, each of the number of primitives in parallel, wherein each primitive in the number of primitives is generated by an associated sequence of functional blocks from the plurality of sequences of functional blocks, each of the associated sequence of functional blocks acting independent of others of the plurality of sequences of functional blocks; and

rendering an image based on the number of primitives.

2. The method of claim 1 , wherein the tessellation factors are generated by a programmable shader.

3. The method of claim 2 , wherein the programmable shader utilizes variable subdivision rates when generating the tessellation factors.

4. The method of claim 1 , wherein the generating, for the three-dimensional surface patch, further comprises:

determining, in each sequence, vertex connectivity defining the primitive, using the tessellation factors and the number of primitives;

determining, in each sequence, integer coordinates for a vertex, using the tessellation factors and the number of vertices; and

determining, in each sequence, floating-point coordinates for the vertex using the integer coordinates.

5. The method of claim 4 wherein the determining of integer coordinates, the determining of floating-point coordinates, and the determining of vertex connectivity are done analytically and in arbitrary order, thereby avoiding iterative tessellation schemes.

6. The method of claim 4 , wherein the determining of floating-point coordinates is performed by a programmable shader.

7. The method of claim 1 , further comprising determining mesh geometry of the surface patch.

8. The method of claim 1 wherein each functional block is implemented as hardware, as software, as firmware, as a shader code, or as any combination of hardware, software, firmware and shader code.

9. A system for performing high-speed tessellation, comprising:

a first functional block configured to determine a number of vertices needed and a number of primitives needed for tessellation of a three-dimensional surface patch, using tessellation factors:

a plurality of sequences of functional blocks configured to receive at least the number of vertices and the number of primitives and generate each of the number of primitives, for the three-dimensional surface patch, in parallel,

wherein each primitive, in the number of primitives is generated by an associated sequence of functional blocks from the plurality of sequences of functional blocks, each of the associated sequence of functional blocks acting independent of others of the plurality of sequences of functional blocks; and

a circuit configured to render an image based on the number of primitives.

10. The system of claim 9 , further comprising circuitry configured to rasterize the patch using the number of primitives generated in parallel.

11. The system of claim 9 , wherein each sequence comprises functional blocks, the functional blocks comprising:

a second functional block configured to determine vertex connectivity defining a primitive in the number of primitives, using the tessellation factors and the number of primitives;

a third functional block configured to determine integer local coordinates for a vertex, using the tessellation factors and the number of vertices; and

a fourth functional block configured to determine parametric floating-point coordinates for the vertex using the integer local coordinates.

12. The system of claim 11 , wherein the third functional block is configured to determine subdivision mesh geometry of the surface patch.

13. The system of claim 11 , wherein the fourth functional block comprises a programmable shader.

14. The system of claim 11 , further comprising a programmable shader configured to determine the tessellation factors.

15. The system of claim 14 , wherein the programmable shader is configured to utilize variable subdivision rates when calculating the tessellation factors.

16. The system of claim 9 , wherein each functional block is implemented as hardware, as software, as firmware, as a shader code, or as any combination of hardware, software, firmware, or shader code.

17. A non-transitory computer readable storage medium having a computer program stored thereon, execution of which by a computing device causes the computing device to:

determine, from tessellation factors, a number of vertices and a number of primitives for tessellation of a three-dimensional surface patch;

provide at least the number of vertices and the number of primitives to a plurality of sequences of functional blocks; and

generate, for the three-dimensional surface patch, each of the number of primitives in parallel, wherein each primitive in the number of primitives is generated by an associated sequence of functional blocks from the plurality of sequences of functional blocks, each of the associated sequence of functional blocks acting independent of others of the plurality of sequences of functional blocks;

and

render an mace based on the number of primitives.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 19, 2016
From: PALTASHEV, TIMOUR T.; PROKOPENKO, BORIS; KIBARDIN, VLADIMIR V.
To: ADVANCED MICRO DEVICES, INC.
Reel/Frame 037524/0127 →
Continuity (1)
Related Publication 20170193697A1 · Jul 6, 2017