IP Library › Granted Patent US 9,961,767
Granted Patent B2
US 9,961,767 · App. 14/990,978 · Granted May 1, 2018

Circuit board and method of manufacturing circuit board

Inventors: Kazuhiro Oshima (Nagano, JP); Hiroharu Yanagisawa (Nagano, JP); Kazuhiro Kobayashi (Nagano, JP); Katsuya Fukase (Nagano, JP); Ken Miyairi (Nagano, JP)
Assignee: SHINKO ELECTRIC INDUSTIRES CO., LTD.
H05K1/036H05K3/007H05K3/4682H05K1/02H05K1/0296H05K1/0298H05K1/0366H05K1/111H05K1/181H05K3/3436H05K2201/01H05K2201/0183H05K2201/10
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Quick Facts
Patent No.
US 9,961,767
App. No.
14/990,978
Granted
May 1, 2018
Kind
B2
Abstract

A circuit board includes an insulating layer including first and second insulator films, a first wiring layer embedded in the first insulator film and including pads and first wiring patterns exposed from the first insulator film, and a second wiring layer including second wiring patterns formed on the second insulator film and via wirings penetrating the insulating layer and electrically connecting the second wiring patterns to the first wiring layer. The first insulator film is made of a reinforcement-free resin that includes no reinforcing member. The second insulator film is made of a reinforcing member impregnated with a resin.

Claims (61)

1. A circuit board comprising:

a first insulating layer including a first insulator film, and a second insulator film provided on a first surface of the first insulator film, wherein a second surface of the first insulator film opposite to the first surface is exposed to an outside of the circuit board;

a first wiring layer, formed by a single flat layer and embedded in the first insulator film, and including a predetermined surface provided with a plurality of pads and a plurality of first wiring patterns, wherein a surface of each of the plurality of pads, forming the predetermined surface, is exposed from the second surface of the first insulator film; and

a second wiring layer including a plurality of second wiring patterns formed on a first surface of the second insulator film opposite to a second surface of the second insulator film in contact with the first surface of the first insulator film, and a plurality of via wirings,

wherein each of the plurality of via wirings has a continuously tapered shape forming a single inverted cone shape continuously penetrating only the second insulator film along a direction in which the second insulator film is provided on the first surface of the first insulator film and electrically connecting the second wiring patterns directly to a surface of the first wiring layer opposite to the predetermined surface,

wherein the first insulator film is made of a reinforcement-free resin that includes no reinforcing member, and covers only side surfaces of the first wiring layer, and

wherein the second insulator film is made of a reinforcing member impregnated with a resin, and the second surface of the second insulator film makes contact with the surface of the first wiring layer opposite to the predetermined surface.

2. The circuit board as claimed in claim 1 , further comprising:

a solder resist layer provided on the second surface of the first insulator film and including an opening exposing the surface of each of the plurality of pads forming the predetermined surface.

3. The circuit board as claimed in claim 1 , wherein the second surface of the first insulator film forms a chip mounting surface on which a semiconductor chip is mounted.

4. The circuit board as claimed in claim 1 , further comprising:

a second insulating layer provided on the second insulator film and covering the plurality of second wiring patterns of the second wiring layer; and

a third wiring layer, provided on the second insulating layer, and electrically connecting to the plurality of second wiring patterns of the second wiring layer.

5. A semiconductor package comprising:

a circuit board according to claim 1 ; and

a semiconductor chip, mounted on the second surface of the first insulator film, and having a plurality of electrode pads electrically connected to the plurality of pads of the first wiring layer.

6. A semiconductor package comprising:

a first circuit board according to claim 1 ;

a first semiconductor chip, mounted on the second surface of the first insulator film of the first circuit board, and having a plurality of electrode pads electrically connected to the plurality of pads of the first wiring layer of the first circuit board;

a second circuit board according to claim 1 ;

a second semiconductor chip, mounted on the second surface of the first insulator film of the second circuit board, and having a plurality of electrode pads electrically connected to the plurality of pads of the first wiring layer of the second circuit board; and

a plurality of solder balls electrically connecting the first wiring layer of the first circuit board and the second wiring layer of the second circuit board, to electrically connect the first semiconductor chip and the second semiconductor chip.

7. The circuit board as claimed in claim 1 , wherein the second insulator film is embedded solely with the plurality of via wirings having the continuously tapered shape.

8. A circuit board comprising:

a first insulating layer including a first insulator film, and a second insulator film provided on a first surface of the first insulator film, wherein a second surface of the first insulator film opposite to the first surface is exposed to an outside of the circuit board;

a first wiring layer, formed by a single flat layer and embedded in the first insulator film, and including a predetermined surface provided with a plurality of pads and a plurality of first wiring patterns, wherein a surface of each of the plurality of pads, forming the predetermined surface, is exposed from the second surface of the first insulator film; and

a second wiring layer including a plurality of second wiring patterns formed on a first surface of the second insulator film opposite to a second surface of the second insulator film in contact with the first surface of the first insulator film, and a plurality of via wirings,

wherein each of the plurality of via wirings has a continuously tapered shape forming a single inverted cone shape continuously penetrating the first insulator film and the second insulator film along a direction in which the second insulator film is provided on the first surface of the first insulator film and electrically connecting the second wiring patterns directly to a surface of the first wiring layer opposite to the predetermined surface,

wherein the first insulator film is made of a reinforcement-free resin that includes no reinforcing member,

wherein the second insulator film is made of a reinforcing member impregnated with a resin, and

wherein the first insulator film covers side surfaces of the first wiring layer, and partially covers the surface of the first wiring layer opposite to the predetermined surface.

9. A semiconductor package comprising:

a circuit board according to claim 8 ; and

a semiconductor chip, mounted on the second surface of the first insulator film, and having a plurality of electrode pads electrically connected to the plurality of pads of the first wiring layer.

10. A semiconductor package comprising:

a first circuit board according to claim 8 ;

a first semiconductor chip, mounted on the second surface of the first insulator film of the first circuit board, and having a plurality of electrode pads electrically connected to the plurality of pads of the first wiring layer of the first circuit board;

a second circuit board as claimed in claim 8 ;

a second semiconductor chip, mounted on the second surface of the first insulator film of the second circuit board, and having a plurality of electrode pads electrically connected to the plurality of pads of the first wiring layer of the second circuit board; and

a plurality of solder balls electrically connecting the first wiring layer of the first circuit board and the second wiring layer of the second circuit board, to electrically connect the first semiconductor chip and the second semiconductor chip.

11. The circuit board as claimed in claim 8 , further comprising:

a solder resist layer provided on the second surface of the first insulator film and including an opening exposing the surface of each of the plurality of pads forming the predetermined surface.

12. The circuit board as claimed in claim 8 , wherein the second surface of the first insulator film forms a chip mounting surface on which a semiconductor chip is mounted.

13. The circuit board as claimed in claim 8 , further comprising:

a second insulating layer provided on the second insulator film and covering the plurality of second wiring patterns of the second wiring layer; and

a third wiring layer, provided on the second insulating layer, and electrically connecting to the plurality of second wiring patterns of the second wiring layer.

14. The circuit board as claimed in claim 8 , wherein the second insulator film is embedded solely with the plurality of via wirings having the continuously tapered shape.

15. A circuit board comprising:

a first insulating layer including a first insulator film, and a second insulator film provided on a first surface of the first insulator film, wherein a second surface of the first insulator film opposite to the first surface is exposed to an outside of the circuit board;

a first wiring layer, formed by a single flat layer and embedded in the first insulator film, and including a predetermined surface provided with a plurality of pads and a plurality of first wiring patterns, wherein a surface of each of the plurality of pads, forming the predetermined surface, is exposed from the second surface of the first insulator film; and

a second wiring layer including a plurality of second wiring patterns formed on a first surface of the second insulator film opposite to a second surface of the second insulator film in contact with the first surface of the first insulator film, and a plurality of via wirings penetrating only the second insulator film and electrically connecting the second wiring patterns directly to a surface of the first wiring layer opposite to the predetermined surface,

wherein the surface of the first wiring layer opposite to the predetermined surface protrudes from the first surface of the first insulator film into the second insulator film,

wherein each of the plurality of via wirings penetrates only the second insulator film, and electrically connects to the surface of the first wiring layer opposite to the predetermined surface,

wherein the first insulator film is made of a reinforcement-free resin that includes no reinforcing member, and covers only side surfaces of the first wiring layer, and

wherein the second insulator film is made of a reinforcing member impregnated with a resin.

16. The circuit board as claimed in claim 15 , further comprising:

a solder resist layer provided on the second surface of the first insulator film and including an opening exposing the surface of each of the plurality of pads forming the predetermined surface.

17. The circuit board as claimed in claim 15 , wherein the second surface of the first insulator film forms a chip mounting surface on which a semiconductor chip is mounted.

18. The circuit board as claimed in claim 15 , further comprising:

a second insulating layer provided on the second insulator film and covering the plurality of second wiring patterns of the second wiring layer; and

a third wiring layer, provided on the second insulating layer, and electrically connecting to the plurality of second wiring patterns of the second wiring layer.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 8, 2016
From: OSHIMA, KAZUHIRO; YANAGISAWA, HIROHARU; KOBAYASHI, KAZUHIRO; FUKASE, KATSUYA; MIYAIRI, KEN
To: SHINKO ELECTRIC INDUSTRIES CO., LTD.
Reel/Frame 037439/0133 →
Priority Claims (2)
JP 2015-024770 · Feb 10, 2015 · national
JP 2015-101245 · May 18, 2015 · national
Continuity (1)
Related Publication 20160234932A1 · Aug 11, 2016