Memory device with manufacturable cylindrical storage node
View Patent ↗A high capacitance embedded capacitor and associated fabrication processes are disclosed for fabricating a capacitor stack in a multi-layer stack to include a first capacitor plate conductor formed with a cylinder-shaped storage node electrode formed in the multi-layer stack, a capacitor dielectric layer surrounding the cylinder-shaped storage node electrode, and a second capacitor plate conductor formed from a conductive layer in the multi-layer stack that is sandwiched between a bottom and top dielectric layer, where the cylinder-shaped storage node electrode is surrounded by and extends through the conductive layer.
1. A memory device having a semiconductor substrate that includes a substrate surface, the memory device comprising:
a first conductive plate;
a second conductive plate;
a select transistor on the substrate surface, the select transistor including a source end and a drain end;
a conducting line having a location thereon that makes electrical connection to the source end of the select transistor;
a cylindrical storage element connected to the drain end of the select transistor, the cylindrical storage element including a cylindrical conductive element, the cylindrical conductive element penetrating through at least the first conductive plate and the second conductive plate;
an insulating film including:
a sidewall portion at least substantially perpendicular to the substrate surface and covering a side surface of the cylindrical conductive element; and
a bottom portion at least substantially parallel to the substrate surface, and the insulating film intervening between the first conductive plate and the cylindrical conductive element, and the insulating film further intervening between the second conductive plate and the cylindrical conductive element; and
a hole defined by the bottom portion of the insulating film, and the cylindrical conductive element penetrating through the hole and being electrically connected to the drain end of the select transistor.
2. The memory device of claim 1 further comprising an interlayer insulation layer, and
wherein the second conductive plate is stacked over the first conductive plate and an interlayer insulation layer is intervening between the first and second conductive plates.
3. The memory device of claim 2 wherein the cylindrical conductive element includes at least a conformal conductive layer.
4. The memory device of claim 2 wherein the insulating film comprises silicon nitride.
5. The memory device of claim 2 wherein the cylindrical conductive element comprises polysilicon.
6. The memory device of claim 2 further comprising:
a first contact that intervenes between the cylindrical storage element and the semiconductor substrate, and
wherein a lateral diameter of a portion of the cylindrical storage element proximate to the first contact is smaller than a lateral diameter of a widest portion of the first contact.
7. The memory device of claim 6 further comprising a second contact that intervenes between the conducting line and the semiconductor substrate.
8. The memory device of claim 2 wherein the conducting line is located closer to the semiconductor substrate than the cylindrical storage element.
9. The memory device of claim 2 wherein the select transistor includes a channel, and at least a portion of the channel being located within the semiconductor substrate and extending in a direction horizontal to substrate surface.
10. The memory device of claim 1 further comprising active circuits forming part of the semiconductor substrate.
11. The memory device of claim 10 wherein the active circuits comprise volatile memory circuits.
12. The memory device of claim 1 wherein the cylindrical storage element is located at the M2 interconnect layer of the memory device.
13. The memory device of claim 1 wherein the cylindrical storage element is located at the M1 interconnect layer of the memory device.
14. A semiconductor device comprising:
a semiconductor substrate having an upper surface;
a select transistor having a gate electrode;
a first contact plug adjacent to the gate electrode and in direct contact with the semiconductor substrate, the first contact plug having a lower portion proximate to the semiconductor substrate and a pad portion on the lower portion, the pad portion being wider than the lower portion;
a conductive pillar on the contact plug, the conductive pillar having a substantially cylindrical shape and having a side surface and a bottom surface, the bottom surface being in direct contact with the contact plug;
an insulating film surrounding the side surface of the conductive pillar, the insulating film having a bottom portion in direct contact with the contact plug, the bottom portion surrounding the bottom surface of the conductive pillar;
first and second conductive layers being substantially plate-shaped, the first conductive layer surrounding a lower portion of the insulating film and the conductive pillar, and the second conductive layer surrounding an upper portion of the insulating film and the conductive pillar; and
an interlayer insulation layer intervening between the first and second conductive layers.
15. The semiconductor device of claim 14 further comprising a memory wherein the conductive pillar forms part of a storage element of the memory.
16. The semiconductor device of claim 14 wherein the conductive pillar includes at least a conformal conductive layer.
17. The semiconductor device of claim 14 wherein the insulating film comprises silicon nitride.
18. The semiconductor device of claim 14 wherein the conductive pillar comprises polysilicon.