Power management in an electronic system through reducing energy usage of a battery and/or controlling an output power of an amplifier thereof
View Patent ↗A method includes configuring a battery and a voltage regulator configured to regulate an output voltage of the battery to supply power to a memory of an electronic circuit also comprising non-memory circuitry. The method also includes switching the supply of power between the battery and the voltage regulator such that: the memory is powered from the battery when the non-memory circuitry is inactive, the memory is powered from a combination of voltage from the battery and the voltage regulator when the memory is about to communicate with the non-memory circuitry during a transition of the non-memory circuitry into an active state thereof, and the memory and the non-memory circuitry are powered from the voltage regulator during the active state of the non-memory circuitry. Thus, minimal current is drawn from the battery while a state of the memory of the electronic circuit is preserved.
1. A method comprising:
configuring a battery and a voltage regulator configured to regulate an output voltage of the battery to supply power to a memory of an electronic circuit also comprising non-memory circuitry; and
switching the supply of power between the battery and the voltage regulator such that:
the memory is powered from the battery when the non-memory circuitry is inactive,
the memory is powered from a combination of voltage from the battery and the voltage regulator when the memory is about to communicate with the non-memory circuitry during a transition of the non-memory circuitry into an active state thereof, and
the memory and the non-memory circuitry are powered from the voltage regulator during the active state of the non-memory circuitry,
thereby minimizing current drawn from the battery while preserving a state of the memory of the electronic circuit.
2. The method of claim 1 , further comprising:
coupling a regulator switch between the voltage regulator and the memory, the regulator switch being configured to be closed during the active state of the non-memory circuitry and opened during inactivity thereof; and
coupling a battery switch between the battery and the memory, the battery switch being configured to be closed during the inactivity of the non-memory circuitry and opened during the active state of the non-memory circuitry,
wherein both the regulator switch and the battery switch are configured to be closed during the transition of the non-memory circuitry into the active state thereof.
3. The method of claim 2 , further comprising:
coupling a switch resistor between the battery and the battery switch to provide an appropriate voltage to the memory when the battery switch is closed.
4. The method of claim 1 , further comprising powering the memory from the combination of voltage from the battery and the voltage regulator during shutdown.
5. A system comprising:
a memory;
non-memory circuitry;
a battery; and
a voltage regulator configured to regulate an output voltage of the battery,
wherein the battery and the voltage regulator are configured to supply power to the memory based on switching the supply of power between the battery and the voltage regulator such that:
the memory is powered from the battery when the non-memory circuitry is inactive,
the memory is powered from a combination of voltage from the battery and the voltage regulator when the memory is about to communicate with the non-memory circuitry during a transition of the non-memory circuitry into an active state thereof, and
the memory and the non-memory circuitry are powered from the voltage regulator during the active state of the non-memory circuitry,
thereby minimizing current drawn from the battery while preserving a state of the memory.
6. The system of claim 5 , further comprising:
a regulator switch coupled between the voltage regulator and the memory, the regulator switch being configured to be closed during the active state of the non-memory circuitry and opened during inactivity thereof; and
a battery switch coupled between the battery and the memory, the battery switch being configured to be closed during the inactivity of the non-memory circuitry and opened during the active state of the non-memory circuitry,
wherein both the regulator switch and the battery switch are configured to be closed during the transition of the non-memory circuitry into the active state thereof.
7. The system of claim 6 , further comprising:
a switch resistor coupled between the battery and the battery switch to provide an appropriate voltage to the memory when the battery switch is closed.
8. The system of claim 5 , wherein the memory is powered from the combination of voltage from the battery and the voltage regulator during shutdown.