Array substrate of display and method of manufacturing the same
A method of manufacturing an array substrate of a display is provided. The method includes forming a first bank material layer on a first substrate, wherein a material of the first bank material layer includes hydrophobic element; patterning the first bank material layer to form a first bank having at least one first concave; forming a first electrode on the first bank and in the first concave after the step of patterning the first bank material layer to form the first bank; and forming an color layer on the first electrode.
1. A method of manufacturing an array substrate, comprising:
forming a thin film transistor on a first substrate;
forming a first bank material layer on the thin film transistor, wherein a material of the first bank material layer comprises a hydrophobic element;
patterning the first bank material layer to form a first bank having a first concave and a contact hole, wherein the contact hole is located above a drain of the thin film transistor;
forming a first electrode on the first bank and in the first concave after the step of patterning the first bank material layer to form the first bank, wherein a portion of the first electrode is in the contact hole;
forming a second bank material layer on the first electrode, in the contact hole, and in the first concave; and
forming a color layer on the first electrode and touching the first bank;
wherein the first bank is hydrophobic so that the color layer does not overflow during the step of forming the color layer.
2. The method according to claim 1 , wherein the color layer comprises an organic emission layer, a material of the second bank material layer comprises a hydrophilic element and wherein the method further comprises:
patterning the second bank material layer to form a second bank having a second concave; and
forming a second electrode on the organic emission layer, wherein the organic emission layer is located in the second concave.
3. The method according to claim 2 , wherein the second bank substantially surrounds the color layer.
4. The method according to claim 2 , wherein a material of the first electrode comprises aluminium Neodymium (AlNd), Indium Tin Oxide (ITO), Titanium (Ti), Aluminium (Al), or silver (Ag), and a material of the second electrode comprises Indium Tin Oxide (ITO), indium zinc oxide (IZO), Zinc oxide (ZnO), aluminium doped zinc oxide (AZO).
5. The method according to claim 2 , further comprising:
disposing a mask above the first bank material layer located on the thin film transistor, wherein the step of patterning the first bank material layer is utilizing the mask to remove a portion of the first bank material layer to form the first concave and the contact hole located above the drain of the thin film transistor;
wherein, the thin film transistor is a driving thin film transistor.
6. The method according to claim 5 , wherein the mask is a half-tone mask or a grey-tone mask.
7. The method according to claim 5 , further comprising:
forming a passivation layer on the driving thin film transistor before the step of forming the first bank material layer on the first substrate; and
patterning the passivation layer to form an opening to expose the drain of the driving thin film transistor, wherein the opening and the contact hole of the first bank are connected with each other.
8. The method according to claim 5 , wherein the first electrode is electrically connected with the drain of the driving thin film transistor.
9. The method according to claim 2 , wherein a horizontal distance between an edge of the second concave and that of the first concave is about 3 micrometer to about 5 micrometer.
10. The method according to claim 9 , wherein the second bank is completely within the first concave.
11. The method according to claim 2 , wherein the hydrophobic element comprises fluorine.
12. The method according to claim 1 , wherein the color layer comprises a red color filter, a green color filter or a blue color filter.