METALORGANIC CHEMICAL VAPOR DEPOSITION OF OXIDE DIELECTRICS ON N-POLAR III-NITRIDE SEMICONDUCTORS WITH HIGH INTERFACE QUALITY AND TUNABLE FIXED INTERFACE CHARGE
A method of fabricating a III-nitride semiconductor device, including growing an III-nitride semiconductor and an oxide sequentially to form an oxide/III-nitride interface, without exposure to air in between growth of the oxide and growth of the III-nitride semiconductor.
1 . A method of fabricating a III-nitride semiconductor device, comprising:
forming a III-nitride semiconductor layer on a substrate; and
forming an oxide layer on a side of the III-nitride semiconductor layer opposite the substrate, forming an oxide/III-nitride interface,
wherein a fixed interface charge density at the oxide/III-nitride interface is greater than −2.5×10 12 cm −2 .
2 . The method of claim 1 , wherein the oxide layer comprises Aluminum Silicon Oxide (AlSiO).
3 . The method of claim 2 , wherein the oxide layer is grown without exposure to air in between growth of the oxide layer and growth of the III-nitride semiconductor layer.
4 . The method of claim 3 , wherein the growing of the oxide layer and the III-nitride semiconductor layer is performed in-situ in a growth reactor.
5 . The method of claim 1 , wherein the device is a metal oxide semiconductor high electron mobility transistor (MOSHEMT).
6 . The method of claim 5 , wherein the III-nitride semiconductor layer includes an active region of the device and the oxide layer is between a gate of the device and the active region.
7 . The method of claim 1 , wherein the oxide layer and the III-nitride semiconductor layer are grown at a temperature above 500° C.
8 . The method of claim 1 , wherein the oxide layer and the III-nitride semiconductor layer are grown at a temperature above 900° C.
9 . The method of claim 1 , wherein the III-nitride semiconductor layer is an N-polar III-nitride layer.
10 . A method of fabricating a III-nitride semiconductor device, comprising:
forming a III-nitride semiconductor layer on a substrate; and
forming an oxide layer on a side of the III-nitride semiconductor layer opposite the substrate, thereby forming an oxide/III-nitride interface, wherein a fixed interface charge density at the oxide/III-nitride interface is negative.
11 . The method of claim 10 , wherein the oxide layer comprises Aluminum Silicon Oxide (AlSiO).
12 . The method of claim 11 , wherein the oxide layer is grown without exposure to air in between growth of the oxide layer and growth of the III-nitride semiconductor layer.
13 . The method of claim 12 , wherein the growing of the oxide and III-nitride semiconductor layer is performed in-situ in a growth reactor.
14 . The method of claim 10 , wherein the device is a metal oxide semiconductor high electron mobility transistor (MOSHEMT).
15 . The method of claim 14 , wherein the III-nitride semiconductor layer includes an active region of the device and the oxide layer is between a gate of the device and the active region.
16 . The method of claim 10 , wherein the oxide and the III-nitride semiconductor layer are grown at a temperature above 500° C.
17 . The method of claim 10 , wherein the oxide and the III-nitride semiconductor layer are grown at a temperature above 900° C.
18 . The method of claim 10 , wherein the III-nitride semiconductor layer is an N-polar III-nitride layer.
19 . A semiconductor device, comprising:
a III-N semiconductor layer including an active region, the active region comprising a GaN channel layer and an AlGaN barrier layer;
an oxide layer forming an interface with the active region;
drain and source contacts electrically coupled to the active region; and
a gate deposited on the oxide layer between the source and drain contacts, wherein the oxide layer is Aluminum Silicon Oxide (AlSiO).
20 . The device of claim 19 , wherein a density of trap states at the interface is less than 10 11 cm −2 .