IP Library › Granted Patent US 9,722,081
Granted Patent B1
US 9,722,081 · App. 15/009,834 · Granted Aug 1, 2017

FinFET device and method of forming the same

Inventors: Chun Hsiung Tsai (Hsinchu County, TW); Chien-Tai Chan (Hsinchu, TW); Ziwei Fang (Hsinchu, TW); Kei-Wei Chen (Tainan, TW); Huai-Tei Yang (Hsinchu, TW)
Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
H01L29/7848H01L21/2236H01L21/26513H01L29/66492H01L29/785H01L29/7834
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Quick Facts
Patent No.
US 9,722,081
App. No.
15/009,834
Granted
Aug 1, 2017
Kind
B1
Abstract

A FinFET device and a method of forming the same are disclosed. In accordance with some embodiments, a FinFET device includes a substrate having at least one fin, a gate stack across the at least one fin, a strained layer aside the gate stack and a silicide layer over the strained layer. The strained layer has a boron surface concentration greater than about 2E20 atom/cm 3 within a depth range of about 0-5 nm from a surface of the strained layer.

Claims (33)

1. A method of forming a FinFET device, comprising:

providing a substrate having a gate stack formed thereon, a strained layer formed therein and a first dielectric layer formed aside the gate stack and over the strained layer;

forming an opening through the first dielectric layer, the opening exposing the strained layer;

performing a doping step to the strained layer to form a shallow doped region therein, wherein the shallow doped region and the strained layer have the same conductivity type; and

forming a silicide layer on the strained layer after the doping step,

wherein the method further comprises a pre-amorphous implant (PAI) step before or after the doping step, and the PAI step and the doping step are performed with different elements.

2. The method of claim 1 , wherein the shallow doped region is an amorphous region.

3. The method of claim 1 , wherein the doping step is a boron doping step or a phosphor doping step.

4. The method of claim 3 , wherein the boron doping step is performed at an energy of about 1 KeV to 2 KeV and a dose of about 2E15 atom/cm 2 to 6E15 atom/cm 2 .

5. The method of claim 3 , wherein the phosphor doping step is performed at an energy of about 2 KeV to 5 KeV and a dose of about 2E15 atom/cm 2 to 6E15 atom/cm 2 .

6. The method of claim 1 , wherein the doping step is an ion implantation process.

7. The method of claim 1 , wherein the doping step is a plasma doping process.

8. The method of claim 7 , wherein the plasma doping process is performed by using about 0.1%-10% of a boron-containing gas and about 90%-99.9% of a dilution gas.

9. A method of forming a FinFET device, comprising:

providing a substrate having a gate stack formed thereon, a strained layer formed therein and a first dielectric layer formed aside the gate stack and over the strained layer;

forming an opening through the first dielectric layer, the opening exposing the strained layer;

performing a boron doping step to the strained layer, the boron doping step causing a surface amorphization;

forming a metal layer on the strained layer immediately after the boron doping step; and

performing an annealing step to the substrate,

wherein the boron doping step is performed at an energy of about 1 KeV to 2 KeV and a dose of about 2E15 atom/cm 2 to 6E15 atom/cm 2 .

10. The method of claim 9 , wherein the boron doping step is an ion implantation process.

11. The method of claim 9 , wherein the boron doping step is a plasma doping process.

12. The method of claim 11 , wherein the plasma doping process is performed by using a boron-containing gas and a dilution gas in a ratio of about 0.1%-5% to 95%-99.9%.

13. The method of claim 9 , wherein the annealing step is performed at a temperature of about 850° C. to 1,000° C.

14. A method of forming a FinFET device, comprising:

providing a substrate having a gate stack formed thereon, a strained layer formed therein and a first dielectric layer formed aside the gate stack and over the strained layer;

forming an opening through the first dielectric layer, the opening exposing the strained layer;

performing a boron doping step to the strained layer such that a boron surface concentration is at least about 2E20 atom/cm 3 within a depth range of about 0-5 nm from a surface of the strained layer; and

forming a silicide layer on the strained layer after the boron doping step.

15. The method of claim 14 , wherein the boron doping step is an ion implantation process.

16. The method of claim 15 , wherein the boron surface concentration of the strained layer is in a range from about 2E20 to 1E21 atom/cm 3 .

17. The method of claim 14 , wherein the boron doping step is a plasma doping process.

18. The method of claim 17 , wherein the boron surface concentration of the strained layer is in a range from about 1E21 to 5E21 atom/cm 3 .

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 16, 2016
From: TSAI, CHUN HSIUNG; CHAN, CHIEN-TAI; FANG, ZIWEI; CHEN, KEI-WEI; YANG, HUAI-TEI
To: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Reel/Frame 037991/0635 →