Semiconductor packages including flexible wing interconnection substrate
View Patent ↗A semiconductor package includes a first semiconductor package, a second semiconductor package disposed on the first semiconductor package, and a flexible wing interconnection substrate disposed between the first and second semiconductor packages.
1. A semiconductor package comprising:
a first semiconductor package and a second semiconductor package disposed over the first semiconductor package; and
a flexible wing interconnection substrate disposed between the first and second semiconductor packages,
wherein the flexible wing interconnection substrate comprises:
a fixing portion;
a first flexible wing extending from the fixing portion, with a portion of the first flexible wing being combined with the second semiconductor package;
a second flexible wing extending from the fixing portion to be parallel with the first flexible wing, with a portion of the second flexible wing being combined with the first semiconductor package,
a third flexible wing extending from the fixing portion in an opposite direction to the first flexible wing;
a fourth flexible wing extending from the fixing portion in an opposite direction to the second flexible wing to be parallel with the third flexible wing.
2. The semiconductor package of claim 1 , wherein the flexible wing interconnection substrate further comprises:
a through via penetrating the fixing portion and including a conductive material;
a first trace pattern disposed on the first flexible wing and electrically coupled to the second semiconductor package;
a second trace pattern disposed on the second flexible wing and electrically coupled to the first semiconductor package;
a third trace pattern electrically coupling the first trace pattern to the though via; and
a fourth trace pattern electrically coupling the second trace pattern to the though via.
3. The semiconductor package of claim 1 ,
wherein the fixing portion of the flexible wing interconnection substrate comprises:
a first fixing portion from which the first flexible wing extends;
a second fixing portion from which the second flexible wing extends; and
an intermediate connector located between the first fixing portion and the second fixing portion, and
wherein the first fixing portion, the second fixing portion and the intermediate connector include the same material to constitute a single unified body.
4. The semiconductor package of claim 1 , wherein the fixing portion of the flexible wing interconnection substrate comprises:
a first fixing portion from which the first flexible wing extends;
a second fixing portion from which the second flexible wing extends; and
an adhesive layer bonding the first fixing portion to the second fixing portion.
5. The semiconductor package of claim 1 , wherein the first flexible wing is spaced apart from the second flexible wing to be movable.
6. The semiconductor package of claim 1 , wherein the first flexible wing is in contact with a surface of the second flexible wing and is movable along the surface of the second flexible wing.
7. The semiconductor package of claim 1 , wherein each of the first and second flexible wings include a flexible material which is capable of warping or bending.
8. The semiconductor package of claim 1 , wherein the fixing portion of the flexible wing interconnection substrate supports the first and second flexible wings.
9. The semiconductor package of claim 1 , wherein the first semiconductor package comprises:
a package substrate;
a semiconductor chip mounted on the package substrate;
a protection layer disposed on the package substrate to encapsulate the semiconductor chip; and
a package connector penetrating the protection layer to electrically couple the package substrate to the first flexible wing.
10. The semiconductor package of claim 9 , wherein the package connector is a through mold via (TMV).
11. The semiconductor package of claim 1 , wherein the first semiconductor package comprises:
a package substrate;
a semiconductor chip mounted on the package substrate;
a protection layer covering the semiconductor chip and exposing a portion of a surface of the package substrate; and
a package connector combined with the exposed surface of the package substrate to electrically couple the package substrate to the first flexible wing.
12. The semiconductor package of claim 11 , wherein the package connector includes a solder ball.
13. A semiconductor package comprising:
a first package substrate and a second package substrate disposed on the first package substrate; and
a flexible wing interconnection substrate disposed between the first and second package substrates,
wherein the flexible wing interconnection substrate comprises:
a fixing portion;
a first flexible wing extending from the fixing portion, with a portion of the first flexible wing combined with the second package substrate;
a second flexible wing extending from the fixing portion to be parallel with the first flexible wing, with a portion of the second flexible wing combined with the first package substrate,
a third flexible wing extending from the fixing portion in an opposite direction to the first flexible wing;
a fourth flexible wing extending from the fixing portion in an opposite direction to the second flexible wing to be parallel with the third flexible wing.
14. The semiconductor package of claim 13 , wherein the flexible wing interconnection substrate further comprises:
a though via penetrating the fixing portion and including a conductive material;
a first trace pattern disposed on the first flexible wing and electrically coupled to the second package substrate;
a second trace pattern disposed on the second flexible wing and electrically coupled to the first package substrate;
a third trace pattern electrically coupling the first trace pattern to the though via; and
a fourth trace pattern electrically coupling the second trace pattern to the though via.
15. The semiconductor package of claim 14 , further comprising:
a first package connector that electrically couples the second trace pattern to the first package substrate.
16. The semiconductor package of claim 15 , further comprising:
a first semiconductor chip mounted on the first package substrate; and
a protection layer disposed on the first package substrate to encapsulate the first semiconductor chip,
wherein the first package connector includes a through mold via (TMV) penetrating the first protection layer.
17. The semiconductor package of claim 15 , further comprising:
a second package connector that electrically couples the first trace pattern to the second package substrate.
18. The semiconductor package of claim 17 , wherein the second package connector includes a solder ball.
19. The semiconductor package of claim 16 , further comprising:
a second semiconductor chip mounted on the second package substrate; and
a bonding wire electrically coupling the second semiconductor chip to the second package substrate.