IP Library Granted Patent US 10,089,425
Granted Patent B2
US 10,089,425 · App. 15/014,662 · Granted Oct 2, 2018

Resource mapping in a hardware emulation environment

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Quick Facts
Patent No.
US 10,089,425
App. No.
15/014,662
Granted
Oct 2, 2018
Kind
B2
Abstract

A system and method is disclosed in an emulation environment that dynamically remaps user designs. In one embodiment, a request is received to load an integrated circuit design to be emulated in a desired partition within the emulator. The emulator automatically determines the availability of the partition requested. If the partition is not available, the design is dynamically remapped to a different partition that is available. In another embodiment, clocks associated with the integrated circuit design are also dynamically remapped. In yet another embodiment, the user can control the size of the partitions (e.g., the number of printed circuit boards in a partition).

Claims (38)

1. A method, comprising:

receiving a request to load an integrated circuit design to a hardware emulator, wherein the request comprises a resource identifier indicating a first set of one or more printed circuit boards of the hardware emulator;

determining that a printed circuit board in the first set of one or more printed circuit boards is unavailable;

determining a second set of one or more printed circuit boards corresponding to the integrated circuit design, wherein the second set of one or more printed circuit boards is available; and

modifying the resource identifier to indicate the second set of one or more printed circuit boards.

2. The method of claim 1 , further comprising:

loading the integrated circuit design to the second set of one or more printed circuit boards; and

emulating, by the hardware emulator, the integrated circuit design.

3. The method of claim 1 , further comprising displaying a graphical user interface (GUI) indicating one or more physical parameters of the hardware emulator.

4. The method of claim 1 , wherein the determining that the printed circuit board is unavailable comprises determining that the printed circuit board is allocated to another integrated circuit design.

5. The method of claim 1 , wherein the determining that the printed circuit board is unavailable comprises identifying an overlap in resource requests.

6. The method of claim 1 , wherein the determining that the printed circuit board is unavailable comprises determining that the printed circuit board has a fault.

7. The method of claim 1 , wherein the determining that the printed circuit board is unavailable comprises transmitting an availability request indicating the printed circuit board.

8. The method of claim 1 , wherein the resource identifier indicating the first set of one or more printed circuit boards comprises one or more addresses corresponding to the first set of one or more printed circuit boards.

9. A method, comprising:

receiving a request to load an integrated circuit design to a hardware emulator, wherein the request comprises a resource identifier indicating a first partition of the hardware emulator;

determining that a resource in the first partition is unavailable;

determining a second partition of the hardware emulator that is available; and

mapping the integrated circuit design to the second partition.

10. The method of claim 9 , wherein the determining the second partition comprises determining a smallest available partition, of the hardware emulator, compatible with the integrated circuit design.

11. The method of claim 9 , further comprising, prior to the mapping, compiling the integrated circuit design.

12. The method of claim 11 , wherein the compiling the integrated circuit design comprises compiling, for the first partition, the integrated circuit design.

13. The method of claim 9 , wherein the determining that the resource is unavailable comprises determining that a printed circuit board is allocated to another integrated circuit design.

14. The method of claim 9 , further comprising routing one or more clocks to the second partition.

15. The method of claim 9 , further comprising:

loading the integrated circuit design to the second partition; and

emulating, by the hardware emulator, the integrated circuit design.

16. The method of claim 9 , further comprising displaying a graphical user interface (GUI) indicating one or more physical parameters of the hardware emulator.

17. A method, comprising:

receiving a request to load an integrated circuit design to a hardware emulator, wherein the request comprises a resource identifier indicating a partition of the hardware emulator;

determining that the partition is unavailable;

determining a smallest available partition of the hardware emulator that fits the integrated circuit design; and

mapping the integrated circuit design to the smallest available partition.

18. The method of claim 17 , further comprising:

loading the integrated circuit design to the smallest available partition; and

emulating, by the hardware emulator, the integrated circuit design.

19. The method of claim 17 , wherein the determining that the partition is unavailable comprises determining that at least a portion of the partition is allocated to another integrated circuit design or has a fault.

20. The method of claim 17 , wherein the resource identifier indicating the partition comprises one or more addresses corresponding to the partition.

Assignments (3)
MERGER AND CHANGE OF NAME Recorded Jun 29, 2021
From: MENTOR GRAPHICS CORPORATION; SIEMENS INDUSTRY SOFTWARE INC.
To: SIEMENS INDUSTRY SOFTWARE INC.
Reel/Frame 056702/0712 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 30, 2018
From: DURAND, ERIC; BRUNOT, GRÉGOIRE; REYMOND, ESTELLE; BUCHARD, LAURENT
To: MENTOR GRAPHICS CORPORATION, META SYSTEMS DIVISION
Reel/Frame 046501/0698 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 30, 2018
From: MENTOR GRAPHICS CORPORATION, META SYSTEMS DIVISION
To: MENTOR GRAPHICS CORPORATION
Reel/Frame 046502/0049 →