IP Library Granted Patent US 9,857,424
Granted Patent B2
US 9,857,424 · App. 15/016,640 · Granted Jan 2, 2018

Automated test equipment, instruction provider for providing a sequence of instructions, method of providing signal to a device under test, method for providing a sequence of instructions and test system

Inventor: Kazi Iftekhar Ahmed (Stuttgart, DE)
Assignee: Advantest Corporation
G01R31/3177G01R31/31703G01R31/31917
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Quick Facts
Patent No.
US 9,857,424
App. No.
15/016,640
Granted
Jan 2, 2018
Kind
B2
Abstract

An automated test equipment includes a test processor configured to provide a signal to a device under test on the basis of a sequence of instructions defining an evaluation of test vectors. The test processor is configured to map a test vector onto a set of signal states or signal transitions. Furthermore, the test processor is configured to variably select a number of signal states or signal transitions provided in the signal based on a current test vector in dependence on a current instruction.

Claims (50)

1. A system comprising automated test equipment, the system comprising:

a test processor configured to provide a signal to a device under test based on a sequence of instructions defining an evaluation of test vectors, wherein each of the test vectors is mapped onto a fixed number of signal states or signal transitions;

wherein the test processor is configured to map a current test vector onto a set of signal states or signal transitions in dependence on a current instruction; and

wherein the test processor is configured to select a number less than the number of the fixed number of the signal states or signal transitions of the current test vector to be provided in the signal in dependence on the current instruction.

2. The system comprising automated test equipment according to claim 1 , wherein the number of signal states or signal transitions of the current test vector to be provided in the signal and defined in the current instruction is smaller than the fixed number of signal states or signal transitions of the set of signal states or signal transitions onto which the current test vector is mapped onto.

3. The system comprising automated test equipment according to claim 1 ,

wherein the test processor is configured to process a first type of instruction defining provision, in the signal, of a true subset of the set of signal states or signal transitions onto which a test vector is mapped and is also configured to process a second type of instruction defining the provision, in the signal, of a complete set of signal transition or signal states onto which the test vector is mapped; and

wherein the current instruction is from the first type of instruction.

4. The system comprising automated test equipment according to claim 1 , wherein the test processor is configured to subsequently repeat a selected number of signal states or signal transitions in the signal in dependence on a number of repetitions defined in the current instruction.

5. The system comprising automated test equipment according to claim 1 , further comprising:

a table comprising the test vectors and per test vector an associated set of signal states or signal transitions; and

wherein the test processor is configured to map the current test vector on its associated set of signal states or signal transitions based on the table.

6. The system comprising automated test equipment according to claim 1 ,

wherein the current test vector is mapped onto m signal states or signal transitions, where m is a positive integer value; and

wherein the test processor is configured to select n signal states or signal transitions onto which the current test vector is mapped based on the current instruction for providing in the signal and to omit providing the remaining m minus n signal transitions or signal states onto which the current test vector in the signal, where n is a positive integer value.

7. The system comprising automated test equipment according to claim 6 , wherein a sequence of the signal states or signal transitions onto which the current test vector is mapped is fixed such that the n selected signal states or signal transitions are the first n signal states or signal transitions in the set of signal states or signal transitions onto which the current test vector is mapped.

8. The system comprising automated test equipment according to claim 1 ,

wherein the test processor is configured to, in response to a first instruction in the sequence of instructions select and provide in the signal a first number of signal states or signal transitions based on the current test vector and to, in response to a second instruction in the sequence of instructions select and provide in the signal a second number of signal states or signal transitions based on the current test vector; and

wherein the first number of signal states or signal transitions is different from the second number of signal states or signal transitions.

9. A method for providing a signal to a device under test, the method comprising:

providing the signal to the device under test based on a sequence of instructions defining an evaluation of test vectors, a test vector being mapped onto a set of signal states or signal transitions;

wherein a number of signal states or signal transitions of a current test vector provided in the signal is variably selected in dependence on a current instruction;

wherein each of the test vectors is mapped onto a fixed number of signal states or signal transitions; and

selecting a number less than the fixed number of signal states or signal transitions of the current test vector to be provided in the signal in dependence on the current instruction.

10. The method according to claim 9 , further comprising:

providing in the signal a first number of signal states or signal transitions based on the current test vector in response to a first instruction in the sequence of instructions; and

providing in the signal a second number of signal states or signal transitions based on the current test vector in response to a second instruction in the sequence of instructions; and wherein the first number of signal states or signal transitions is different from the second number of signal states or signal transitions.

11. A system comprising an instruction provider for providing a sequence of instructions defining an evaluation of test vectors, wherein each test vector is associated to a predetermined number of signal states or signal transitions;

wherein the instruction provider is configured to provide the sequence of instructions such that at least a first instruction in the sequence of instructions defines provision of a true subset of the predetermined number of signal states or signal transitions associated with a first test vector;

wherein the instruction provider is configured to provide in the sequence of instructions a first type of instruction defining the first test vector and a number of signal states or signal transitions in the true subset of the predetermined number of signal states or signal transitions associated with the first test vector; and

wherein the instruction provider is further configured to provide in the sequence of instructions a second type of instruction defining a second test vector and provision of a complete set of the predetermined number of signal states or signal transitions associated with the second test vector.

12. The system comprising an instruction provider according to claim 11 ,

wherein the instruction provider is configured to provide the sequence of instructions such that at least a second instruction defines a provision of a further true subset of the predetermined number of signal states or signal transitions associated to the first test vector or of the complete set of signal states or signal transitions associated to the first test vector, and

wherein the further true subset is different from the true subset.

13. The system comprising an instruction provider according to claim 11 , wherein the instruction provider is configured to provide the sequence of instructions such that at least the first instruction comprises information defining a number of times the true subset is to be provided subsequently.

14. A method for providing a sequence of instructions defining an evaluation of test vectors, wherein each test vector is associated with a predetermined number of signal states or signal transitions, the method comprising:

providing the sequence of instructions such that at least a first instruction in the sequence of instructions defines provision of a true subset of the predetermined number of signal states or signal transitions associated with a first test vector;

providing in the sequence of instructions a first type of instruction defining the first test vector and a number of signal states or signal transitions in the true subset of the predetermined number of signal states or signal transitions associated with the first test vector; and

providing in the sequence of instructions a second type of instruction defining a second test vector and provision of a complete set of the predetermined number of signal states or signal transitions associated with the second test vector.

15. The method according to claim 14 , further comprising:

providing a second instruction in the sequence of instructions, the second instruction defining a provision of a further true subset of the predetermined number of signal states or signal transitions associated with the test vector or the provision of a full set of signal states or signal transitions associated with the test vector.

16. A test system comprising:

the automated test equipment according to claim 1 ; and

an instruction provider for providing a sequence of instructions defining an evaluation of test vectors, wherein each test vector is associated to a predetermined set of signal states or signal transitions;

wherein the instruction provider is configured to provide the sequence of instructions such that at least a first instruction in the sequence of instructions defines a provision of a true subset of the predetermined set of signal states or signal transitions associated with a test vector;

wherein the instruction provider is configured to provide in the sequence of instructions a first type of instruction defining a test vector and provision of a number of signal states or signal transitions of the predetermined set of signal states or signal transitions associated with the test vector;

wherein the first instruction is from the first type of instruction; and

wherein the instruction provider is further configured to provide in the sequence of instructions a second type of instruction defining a test vector and provision of a complete set of the predetermined set of signal states or signal transitions associated with the test vector.

17. A non-transitory digital storage medium having a computer program stored thereon to perform the method according to claim 9 when the computer program is run by a computer.

18. A non-transitory digital storage medium having a computer program stored thereon to perform the method according to claim 14 when the computer program is run by a computer.

Assignments (2)
CHANGE OF ADDRESS Recorded Dec 18, 2018
From: ADVANTEST CORPORATION
To: ADVANTEST CORPORATION
Reel/Frame 047987/0626 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 6, 2016
From: AHMED, KAZI IFTEKHAR
To: ADVANTEST CORPORATION
Reel/Frame 039077/0944 →
Continuity (2)
Continuation PCTEP2013066728 · Aug 9, 2013
Related Publication 20160154060A1 · Jun 2, 2016