IP Library Granted Patent US 10,431,714
Granted Patent B2
US 10,431,714 · App. 15/016,943 · Granted Oct 1, 2019

Engineered substrates for semiconductor devices and associated systems and methods

Inventors: Martin F. Schubert (Sunnyvale, CA); Cem Basceri (Los Gatos, CA); Vladimir Odnoblyudov (Danville, CA); Casey Kurth (Boise, ID); Thomas Gehrke (Boise, ID)
Assignee: Qromis, Inc.
H01L33/0079H01L33/007H01L33/0062H01L33/0066H01L33/0075H01L33/0095H01L33/02H01L33/16H01L33/46
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Quick Facts
Patent No.
US 10,431,714
App. No.
15/016,943
Granted
Oct 1, 2019
Kind
B2
Abstract

Engineered substrates for semiconductor devices are disclosed herein. A device in accordance with a particular embodiment includes a transducer structure having a plurality of semiconductor materials including a radiation-emitting active region. The device further includes an engineered substrate having a first material and a second material, at least one of the first material and the second material having a coefficient of thermal expansion at least approximately matched to a coefficient of thermal expansion of at least one of the plurality of semiconductor materials. At least one of the first material and the second material is positioned to receive radiation from the active region and modify a characteristic of the light.

Claims (22)

1. A method for fabricating semiconductor devices, the method comprising:

forming an engineered substrate having a first layer comprising a first material, a second layer comprising a second material, and a third layer comprising a dissolvable material and disposed between the first layer and the second layer;

forming a first buffer structure on the second layer;

forming a first transducer structure on the first buffer structure, the first transducer structure having a plurality of semiconductor materials including a radiation-emitting active region, wherein at least one of the first material and the second material in the engineered substrate has a coefficient of thermal expansion approximately matched to a coefficient of thermal expansion of at least one of the plurality of semiconductor materials;

forming a reflective contact electrically coupled to a first semiconductor material of the plurality of semiconductor materials;

forming an insulating layer on the reflective contact;

forming a plurality of buried contacts electrically coupled to a second semiconductor material of the plurality of semiconductor materials, wherein each buried contact passes through the insulating layer, the reflective contact and the first semiconductor material of the plurality of semiconductor materials, and wherein a first end of each buried contact protrudes into the second semiconductor material of the plurality of semiconductor materials, and a second end of each buried contact protrudes through the insulating layer;

forming a first electrode on the insulating layer, wherein the first electrode is electrically and physically coupled to the second end of each buried contact;

forming a second electrode electrically coupled to the reflective contact, wherein a portion of the second electrode is over the insulating layer; and exposing the third layer to a solvent to dissolve the dissolvable material in the third layer, thereby separating the first layer from the second layer.

2. The method of claim 1 , further comprising forming a plurality of vias in the first layer, wherein exposing the third layer to the solvent includes introducing the solvent into the vias to expose the third layer to the solvent.

3. The method of claim 1 wherein the first material comprises polycrystalline aluminum nitride, and the second material comprises silicon.

4. A method for fabricating semiconductor devices, the method comprising:

forming an engineered substrate having a first layer comprising a first material, a second layer comprising a second material, and a third layer comprising implanted hydrogen and disposed between the first layer and the second layer;

forming a first buffer structure on the second layer;

forming a first transducer structure on the first buffer structure, the first transducer structure having a plurality of semiconductor materials including a radiation-emitting active region, wherein at least one of the first material and the second material in the engineered substrate has a coefficient of thermal expansion approximately matched to a coefficient of thermal expansion of at least one of the plurality of semiconductor materials;

forming a reflective contact electrically coupled to a first semiconductor material of the plurality of semiconductor materials;

forming an insulating layer on the reflective contact;

forming a plurality of buried contacts electrically coupled to a second semiconductor material of the plurality of semiconductor materials, wherein each buried contact passes through the insulating layer, the reflective contact and the first semiconductor material of the plurality of semiconductor materials, and wherein a first end of each buried contact protrudes into the second semiconductor material of the plurality of semiconductor materials, and a second end of each buried contact protrudes through the insulating layer;

forming a first electrode on the insulating layer, wherein the first electrode is electrically and physically coupled to the second end of each buried contact;

forming a second electrode electrically coupled to the reflective contact, wherein a portion of the second electrode is over the insulating layer; and

heating the third layer to cause the implanted hydrogen to expand, thereby separating the first layer from the second layer.

5. The method of claim 4 wherein the first material comprises polycrystalline aluminum nitride, and the second material comprises silicon.

Assignments (3)
CHANGE OF NAME Recorded Nov 9, 2017
From: QUORA TECHNOLOGY, INC.
To: QROMIS, INC.
Reel/Frame 044416/0683 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 12, 2016
From: MICRON TECHNOLOGY, INC.
To: QUORA TECHNOLOGY, INC.
Reel/Frame 038258/0426 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 5, 2016
From: SCHUBERT, MARTIN F.; BASCERI, CEM; ODNOBLYUDOV, VLADIMIR; KURTH, CASEY; GEHRKE, THOMAS
To: MICRON TECHNOLOGY, INC.
Reel/Frame 037676/0297 →
Continuity (2)
Division 13223162 · Aug 31, 2011
Related Publication 20160155893A1 · Jun 2, 2016