Solid-state imaging device with shared pixel structure
A solid-state imaging device includes pixels each of which has a photoelectric conversion portion that senses light and converts the sensed light into a charge; and an amplifying portion which is shared by a predetermined number of the pixels, amplifies the generated charge in the photoelectric conversion portion, and outputs a level of signal corresponding to the charge, wherein the a predetermined number of the pixels which share the amplifying portion are arranged in a first direction extending along a signal line via which the amplifying portion outputs the signal, and wherein a length of an area where the amplifying portion is formed along a second direction substantially intersecting the first direction is set to be equal to or more than a length of one pixel and to be less than a length of two pixels in the second direction.
1. An imaging device, comprising:
a plurality of photoelectric conversion portions, wherein at least two photoelectric conversion portions of the plurality of photoelectric conversion portions are in a first direction;
a selection transistor;
a reset transistor; and
an amplifying transistor shared by the at least two photoelectric conversion portions, wherein
a first gate of the selection transistor, a second gate of the amplifying transistor, and a third gate of the reset transistor are in a first horizontal line along a second direction orthogonal to the first direction,
the first gate is in a region between the at least two photoelectric conversion portions,
the third gate and a first portion of the second gate are at an outside of a first length of the at least two photoelectric conversion portions, wherein the first length corresponds to a length of the at least two photoelectric conversion portions in the second direction, and
a second portion of the second gate is at an inside of the first length,
wherein a second length of the amplifying transistor is equal to the first length.
2. The imaging device according to claim 1 , wherein
the amplifying transistor is connected to at least two signal lines, wherein the at least two signal lines are along the first direction, and
a gap between the at least two signal lines is twice than a width of a signal line of the at least two signal lines.
3. The imaging device according to claim 1 , further comprising:
four pixels shared by the amplifying transistor,
wherein a first pixel of the four pixels is adjacent to a second pixel of the four pixels in the first direction, a third pixel of the four pixels is adjacent to a fourth pixel of the four pixels in the first direction, and wherein the amplifying transistor is between the second pixel and the third pixel.
4. The imaging device according to claim 3 ,
wherein a first pixel sharing unit includes the four pixels in the first direction, wherein a second pixel sharing unit is adjacent to the first pixel sharing unit in the first direction, and wherein the second pixel sharing unit is shifted, in the first direction, relative to the first pixel sharing unit by a pitch of two pixels of the four pixels.
5. The imaging device according to claim 1 , wherein each of the selection transistor and the reset transistor are in a second horizontal line along with the amplifying transistor in the second direction, and
wherein the second length of the amplifying transistor is greater than each of a third length of the selection transistor and a fourth length of the reset transistor.
6. The imaging device according to claim 1 ,
wherein each of the plurality of photoelectric conversion portions is configured to sense light and input the sensed light to a first surface,
wherein a wiring layer that includes a plurality of signal lines is laminated on a second surface opposed to the first surface of a semiconductor substrate, and
wherein the semiconductor substrate includes the plurality of photoelectric conversion portions.
7. An imaging device, comprising:
a plurality of photoelectric conversion portions, wherein a first photoelectric conversion portion and a second photoelectric conversion portion of the plurality of photoelectric conversion portions are in a first direction,
wherein a first transfer transistor is coupled to the first photoelectric conversion portion, and a second transfer transistor is coupled to the second photoelectric conversion portion;
a selection transistor;
a reset transistor; and
an amplifying transistor shared by the first photoelectric conversion portion and the second photoelectric conversion portion, wherein
a first gate of the selection transistor, a second gate of the amplifying transistor, and a third gate of the reset transistor are in a first horizontal line along a second direction orthogonal to the first direction,
the first gate is in a region between the first transfer transistor and the second transfer transistor,
the third gate and a first portion of the second gate are at an outside of a first length of the first transfer transistor and the second transfer transistor, wherein the first length corresponds to a length of each of the first transfer transistor and the second transfer transistor in the second direction, and
a second portion of the second gate is at an inside of the first length of the first transfer transistor and the second transfer transistor.
8. The imaging device according to claim 7 , wherein
the amplifying transistor is connected to at least two signal lines, wherein the at least two signal lines are along the first direction, and
a gap between the at least two signal lines is twice than a width of a signal line of the at least two signal lines.
9. The imaging device according to claim 7 , wherein a second length of the amplifying transistor is equal to the first length.
10. An imaging device, comprising:
a plurality of photoelectric conversion portions, wherein at least two photoelectric conversion portions of the plurality of photoelectric conversion portions are in a first direction;
a selection transistor;
a reset transistor; and
an amplifying transistor shared by the at least two photoelectric conversion portions, wherein
the amplifying transistor is connected to at least two signal lines that are along the first direction,
a gap between the at least two signal lines is twice than a width of a signal line of the at least two signal lines,
a first gate of the selection transistor, a second gate of the amplifying transistor, and a third gate of the reset transistor are in a first horizontal line along a second direction orthogonal to the first direction,
the first gate is in a region between the at least two photoelectric conversion portions,
the third gate and a first portion of the second gate are at an outside of a first length of the at least two photoelectric conversion portions, wherein the first length corresponds to a length of the at least two photoelectric conversion portions in the second direction, and
a second portion of the second gate is at an inside of the first length.
11. An imaging device, comprising:
a plurality of photoelectric conversion portions, wherein at least two photoelectric conversion portions of the plurality of photoelectric conversion portions are in a first direction;
a selection transistor;
a reset transistor; and
an amplifying transistor shared by the at least two photoelectric conversion portions, wherein
a first gate of the selection transistor, a second gate of the amplifying transistor, and a third gate of the reset transistor are in a first horizontal line along a second direction orthogonal to the first direction,
the first gate is in a region between the at least two photoelectric conversion portions,
the third gate and a first portion of the second gate are at an outside of a first length of the at least two photoelectric conversion portions, wherein the first length corresponds to a length of the at least two photoelectric conversion portions in the second direction,
a second portion of the second gate is at an inside of the first length,
each of the selection transistor and the reset transistor are in a second horizontal line along with the amplifying transistor in the second direction, and
a second length of the amplifying transistor is greater than each of a third length of the selection transistor and a fourth length of the reset transistor.