IP Library Granted Patent US 9,985,068
Granted Patent B2
US 9,985,068 · App. 15/029,717 · Granted May 29, 2018

Solid-state imaging device and manufacturing method therefor, and electronic apparatus

Inventors: Taiichiro Watanabe (Kanagawa, JP); Fumihiko Koga (Kanagawa, JP)
Assignee: Sony Semiconductor Solutions Corporation
H01L27/1464H01L27/14607H01L27/14614H01L27/14641H01L27/14689
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Quick Facts
Patent No.
US 9,985,068
App. No.
15/029,717
Granted
May 29, 2018
Kind
B2
Abstract

There is provided a solid state imaging device including a pixel including a photoelectric conversion unit that generates and accumulates a charge according to a received light amount, a charge accumulation unit that accumulates the generated charge, a first transfer transistor that transfers the charge of the photoelectric conversion unit to the charge accumulation unit, a charge holding unit that holds the charge to read out as a signal, and a second transfer transistor that transfers the charge of the charge accumulation unit to the charge holding unit, in which a gate electrode of the first transfer transistor is formed to be buried up to a predetermined depth from a semiconductor substrate interface, and the charge accumulation unit is formed in a longitudinally long shape to be extended in a depth direction along a side wall of the gate electrode of the first transfer transistor to be buried therein.

Claims (57)

1. A solid state imaging device, comprising:

a pixel, including:

a photoelectric conversion unit;

a charge accumulation unit that accumulates the charge which is generated by the photoelectric conversion unit;

a first transfer transistor that transfers the charge of the photoelectric conversion unit to the charge accumulation unit,

wherein a gate electrode of the first transfer transistor extends from a first surface of a semiconductor substrate that is opposite from a light receiving surface of the semiconductor substrate to a predetermined first depth within the semiconductor substrate,

wherein the gate electrode of the first transfer transistor is between the photoelectric conversion unit and the charge accumulation unit,

wherein the charge accumulation unit extends to a second depth adjacent a side wall of the gate electrode of the first transfer transistor which is buried within the semiconductor substrate, and

wherein the charge accumulation unit is smaller than the photoelectric conversion unit in a dimension parallel to a light incident side of the semiconductor substrate, wherein a first portion of the charge accumulation unit that is closest to the light receiving surface includes a first impurity type material, wherein a second portion of the charge accumulation unit that is furthest from the light receiving surface includes a second impurity type material, and wherein a third portion of the charge accumulation unit between the first portion and the second portion includes the first impurity type material having a higher concentration of impurities than the first portion.

2. The solid state imaging device according to claim 1 , further comprising:

a charge holding unit between the gate electrode and another gate electrode of an adjacent pixel, wherein the charge holding unit is separated from the charge accumulation unit in a direction parallel to the light receiving surface of the semiconductor substrate.

3. The solid state imaging device according to claim 2 , wherein the charge accumulation unit is formed on a same side of the first transfer transistor as the charge holding unit, and wherein the photoelectric conversion unit is on an opposite side of the first transfer transistor.

4. The solid state imaging device according to claim 1 , wherein the charge accumulation unit is adjusted so as to make a potential of a light incident side of the charge accumulation unit low, when the first transfer transistor is turned on.

5. The solid state imaging device according to claim 1 , wherein the photoelectric conversion unit is adjusted so as to make a potential of a light incident side high.

6. The solid state imaging device according to claim 1 , further comprising:

a charge holding unit; and

a light shielding film on a light incident side of the charge accumulation unit and the charge holding unit.

7. The solid state imaging device according to claim 1 , wherein a transfer channel of the first transfer transistor is formed in a vicinity of a side wall of the gate electrode.

8. The solid state imaging device according to claim 1 , wherein a transfer channel of the first transfer transistor is formed in a vicinity of a bottom portion of the gate electrode.

9. The solid state imaging device according to claim 1 , wherein the gate electrode of the first transfer transistor is formed of a material having a light shielding capability.

10. The solid state imaging device according to claim 1 , further comprising:

a charge holding unit that holds the charge in order to read out the charge as a signal; and

a second transfer transistor that transfers the charge of the charge accumulation unit to the charge holding unit.

11. The solid state imaging device according to claim 10 , wherein a gate electrode of the second transfer transistor is formed to be buried in a depth direction of the semiconductor substrate.

12. The solid state imaging device according to claim 11 , wherein a depth of the gate electrode of the second transfer transistor is the same as a depth of the gate electrode of the first transfer transistor.

13. The solid state imaging device according to claim 11 , wherein a depth of the gate electrode of the second transfer transistor is shallower than a depth of the gate electrode of the first transfer transistor.

14. The solid state imaging device according to claim 10 , wherein the gate electrode of the first transfer transistor passes through the semiconductor substrate.

15. The solid state imaging device according to claim 14 , wherein a gate electrode of the second transfer transistor is formed to be buried in a depth direction of the semiconductor substrate, and wherein a depth of the gate electrode of the second transfer transistor is shallower than a depth of the gate electrode of the first transfer transistor.

16. The solid state imaging device according to claim 1 , wherein the charge holding unit is configured so as to be shared with other pixels which are adjacent to the pixel.

17. The solid state imaging device of claim 1 , wherein the first depth of the gate electrode of the first transfer transistor is the same as the second depth of the charge accumulation unit.

18. A method for manufacturing a solid state imaging device, comprising:

forming a pixel including a photoelectric conversion unit that generates a charge according to an amount of light which is received;

forming a charge accumulation unit that accumulates the charge which is generated by the photoelectric conversion unit;

forming a first transfer transistor that transfers the charge of the photoelectric conversion unit to the charge accumulation unit;

forming a gate electrode of the first transfer transistor,

wherein the gate electrode of the first transfer transistor extends from a first surface of a semiconductor substrate that is opposite from a light receiving surface of the semiconductor substrate to a predetermined first depth within the semiconductor substrate,

wherein the gate electrode of the first transfer transistor is between the photoelectric conversion unit and the charge accumulation unit,

wherein the charge accumulation unit extends to a second depth adjacent a side wall of the gate electrode of the first transfer transistor which is buried within the semiconductor substrate,

wherein the first depth of the gate electrode of the first transfer transistor is the same as the second depth of the charge accumulation unit,

wherein the charge accumulation unit is smaller than the photoelectric conversion unit in a dimension parallel to a light incident side of the semiconductor substrate, wherein a first portion of the charge accumulation unit that is closest to the light receiving surface includes a first impurity type material, wherein a second portion of the charge accumulation unit that is furthest from the light receiving surface includes a second impurity type material, and wherein a third portion of the charge accumulation unit between the first portion and the second portion includes the first impurity type material having a higher concentration of impurities than the first portion.

19. The method of claim 18 , further comprising:

forming a charge holding unit that holds the charge in order to read out the charge as a signal, and a second transfer transistor that transfers the charge of the charge accumulation unit to the charge holding unit.

20. An electronic apparatus, comprising:

a solid state imaging device,

wherein the solid state imaging device includes a pixel including:

a photoelectric conversion unit;

a charge accumulation unit that accumulates the charge which is generated by the photoelectric conversion unit;

a first transfer transistor that transfers the charge of the photoelectric conversion unit to the charge accumulation unit,

wherein a gate electrode of the first transfer transistor extends from a first surface of a semiconductor substrate that is opposite from a light receiving surface of the semiconductor substrate to a predetermined first depth within the semiconductor substrate,

wherein the gate electrode of the first transfer transistor is between the photoelectric conversion unit and the charge accumulation unit,

wherein the charge accumulation unit extends to a second depth adjacent a side wall of the gate electrode of the first transfer transistor which is buried within the semiconductor substrate,

wherein the first depth of the gate electrode of the first transfer transistor is the same as the second depth of the charge accumulation unit, and

wherein the charge accumulation unit is smaller than the photoelectric conversion unit in a dimension parallel to a light incident side of the semiconductor substrate, wherein a first portion of the charge accumulation unit that is closest to the light receiving surface includes a first impurity type material, wherein a second portion of the charge accumulation unit that is furthest from the light receiving surface includes a second impurity type material, and wherein a third portion of the charge accumulation unit between the first portion and the second portion includes the first impurity type material having a higher concentration of impurities than the first portion.

21. The electronic apparatus of claim 20 , further comprising:

a charge holding unit that holds the charge in order to read out the charge as a signal, and

a second transfer transistor that transfers the charge of the charge accumulation unit to the charge holding unit.

22. The electronic apparatus of claim 20 , wherein a portion of the gate electrode and a portion of the charge accumulation unit that are closest to the light receiving surface are embedded in a same material of the semiconductor substrate.

Assignments (4)
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE INCORRECT APPLICATION NUMBER 14/572221 AND REPLACE IT WITH 14/527221 PREVIOUSLY RECORDED AT REEL: 040815 FRAME: 0649. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Jan 27, 2022
From: SONY CORPORATION
To: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
Reel/Frame 058875/0887 →
CORRECTIVE ASSIGNMENT TO CORRECT THE NATURE OF CONVEYANCE PREVIOUSLY RECORDED ON REEL 039635 FRAME 0495. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Dec 5, 2016
From: SONY CORPORATION
To: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
Reel/Frame 040815/0649 →
CHANGE OF NAME Recorded Aug 9, 2016
From: SONY CORPORATION
To: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
Reel/Frame 039635/0495 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 18, 2016
From: WATANABE, TAIICHIRO; KOGA, FUMIHIKO
To: SONY CORPORATION
Reel/Frame 038450/0062 →
Priority Claims (1)
JP 2013-220141 · Oct 23, 2013 · national
Continuity (1)
Related Publication 20160268322A1 · Sep 15, 2016