IP Library Granted Patent US 9,953,914
Granted Patent B2
US 9,953,914 · App. 15/042,034 · Granted Apr 24, 2018

Substrate-less stackable package with wire-bond interconnect

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 9,953,914
App. No.
15/042,034
Granted
Apr 24, 2018
Kind
B2
Abstract

A method for making a microelectronic unit includes forming a plurality of wire bonds on a first surface in the form of a conductive bonding surface of a structure comprising a patternable metallic element. The wire bonds are formed having bases joined to the first surface and end surfaces remote from the first surface. The wire bonds have edge surfaces extending between the bases and the end surfaces. The method also includes forming a dielectric encapsulation layer over a portion of the first surface of the conductive layer and over portions of the wire bonds such that unencapsulated portions of the wire bonds are defined by end surfaces or portions of the edge surfaces that are unconvered by the encapsulation layer. The metallic element is patterned to form first conductive elements beneath the wire bonds and insulated from one another by portions of the encapsulation layer.

Claims (11)

1. A method for making a microelectronic unit, comprising:

forming a plurality of wire bonds on a conductive bonding surface of a metallic structure, the wire bonds having bases joined to the conductive bonding surface and end surfaces disposed away from the conductive bonding surface;

forming a dielectric layer over at least a portion of the conductive bonding surface and over first portions of the wire bonds, the first portions including the bases thereof having the dielectric layer formed thereover for covering the first portions of the wire bonds, second portions of the wire bonds including the end surfaces thereof not covered by the dielectric layer; and

patterning the metallic structure to form conductive elements separated from one another by the dielectric layer for having the bases of the wire bonds disposed on the conductive elements.

2. The method of claim 1 , wherein at least some of the wire bonds are formed with the end surfaces thereof displaced in one or more lateral directions away from the bases thereof.

3. The method of claim 1 , wherein:

the bases are in a first pattern having a first minimum pitch; and

the second portions of the wire bonds are in a second pattern having a second minimum pitch greater than the first minimum pitch.

4. The method of claim 1 , wherein:

the bases are in a first pattern having a first minimum pitch; and

the second portions of the wire bonds are in a second pattern having a second minimum pitch less than the first minimum pitch.

Assignments (6)
CHANGE OF NAME Recorded Nov 24, 2025
From: INVENSAS CORPORATION
To: INVENSAS LLC
Reel/Frame 073689/0754 →
CHANGE OF NAME Recorded Nov 24, 2025
From: INVENSAS LLC
To: ADEIA SEMICONDUCTOR TECHNOLOGIES LLC
Reel/Frame 073689/0786 →
RELEASE OF SECURITY INTEREST Recorded Jun 11, 2020
From: ROYAL BANK OF CANADA
To: TESSERA, INC.; INVENSAS BONDING TECHNOLOGIES, INC. (F/K/A ZIPTRONIX, INC.); FOTONATION CORPORATION (F/K/A DIGITALOPTICS CORPORATION AND F/K/A DIGITALOPTICS CORPORATION MEMS); INVENSAS CORPORATION; TESSERA ADVANCED TECHNOLOGIES, INC; DTS, INC.; DTS LLC; PHORUS, INC.; IBIQUITY DIGITAL CORPORATION
Reel/Frame 052920/0001 →
SECURITY INTEREST Recorded Jun 1, 2020
From: ROVI SOLUTIONS CORPORATION; ROVI TECHNOLOGIES CORPORATION; ROVI GUIDES, INC.; TIVO SOLUTIONS INC.; VEVEO, INC.; INVENSAS CORPORATION; INVENSAS BONDING TECHNOLOGIES, INC.; TESSERA, INC.; TESSERA ADVANCED TECHNOLOGIES, INC.; DTS, INC.; PHORUS, INC.; IBIQUITY DIGITAL CORPORATION
To: BANK OF AMERICA, N.A.
Reel/Frame 053468/0001 →
SECURITY INTEREST Recorded Dec 2, 2016
From: INVENSAS CORPORATION; TESSERA, INC.; TESSERA ADVANCED TECHNOLOGIES, INC.; ZIPTRONIX, INC.; DIGITALOPTICS CORPORATION; DIGITALOPTICS CORPORATION MEMS; DTS, LLC; DTS, INC.; PHORUS, INC.; IBIQUITY DIGITAL CORPORATION
To: ROYAL BANK OF CANADA, AS COLLATERAL AGENT
Reel/Frame 040797/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 11, 2016
From: MOHAMMED, ILYAS
To: INVENSAS CORPORATION
Reel/Frame 037720/0134 →