SEMICONDUCTOR DEVICE, FABRICATION METHOD FOR SEMICONDUCTOR DEVICE, POWER SUPPLY APPARATUS AND HIGH-FREQUENCY AMPLIFIER
A semiconductor device is configured including a p-type back barrier layer provided over a substrate and formed front a p-type nitride semiconductor in which Mg or Zn is doped, a nitride semiconductor stacked structure provided over the p-type back barrier layer, the nitride semiconductor stacked structure including an electron transit layer and an electron supply layer, a source electrode, a drain electrode and a gate electrode provided over the nitride semiconductor stacked structure, and a groove extending to the p-type back barrier layer.
1 . A semiconductor device, comprising:
a p-type back barrier layer provided over a substrate and formed from a p-type nitride semiconductor in which Mg or Zn is doped;
a nitride semiconductor stacked structure provided over the p-type back barrier layer, the nitride semiconductor stacked structure including an electron transit layer and an electron supply layer;
a source electrode, a drain electrode and a gate electrode provided, over the nitride semiconductor stacked structure; and
a groove extending to the p-type back barrier layer.
2 . The semiconductor device according to claim 1 , wherein the groove extends from the surface of the nitride semiconductor stacked structure to the p-type back barrier layer.
3 . The semiconductor device according to claim 1 , wherein the groove is provided in an active region or in the proximity of the active region.
4 . The semiconductor device according to claim 1 , wherein the groove functions also as an element isolation groove.
5 . The semiconductor device according to claim 1 , wherein the groove is provided in an element isolation region.
6 . The semiconductor device according to claim 1 , wherein the source electrode or the drain electrode is provided over the groove.
7 . The semiconductor device according to claim 1 , wherein the groove extends from the back face of the substrate to the p-type back barrier layer.
8 . The semiconductor device according to claim 1 , wherein the p-type nitride semiconductor is In x Al y Ga (1−x−y) N (0≦x<1, 0≦y<1, 0<x+y≦1).
9 . The semiconductor device according to claim 1 , wherein the substrate is any one of a Si substrate, a SiC substrate, a sapphire substrate, a GaO substrate, an AlN substrate and a GaN substrate.
10 . The semiconductor device according to claim 1 , further comprising a passivation film to cover the surface of the groove.
11 . A power supply apparatus, comprising:
a transistor; wherein
the transistor includes:
a p-type back barrier layer provided over a substrate and formed from a p-type nitride semiconductor in which Mg or Zn is doped;
a nitride semiconductor stacked structure provided over the p-type back barrier layer, the nitride semiconductor stacked structure including an electron transit layer and an electron supply layer;
a source electrode, a drain electrode and a gate electrode provided over the nitride semiconductor stacked structure, and
a groove extending to the p-type back barrier layer.
12 . A high-frequency amplifier, comprising:
an amplifier to amplify an input signal;
the amplifier to include a transistor;
the transistor including:
a p-type back barrier layer provided over a substrate and formed from a p-type nitride semiconductor in which Mg or Zn is doped;
a nitride semiconductor stacked structure provided over the p-type back barrier layer, the nitride semiconductor stacked structure including an electron transit layer and an electron supply layer;
a source electrode, a drain electrode and a gate electrode provided over the nitride semiconductor stacked structure; and
a groove extending to the p-type back barrier layer.
13 . A fabrication method for a semiconductor device, comprising:
forming a p-type back barrier layer from a p-type nitride semiconductor in which Mg or Zn is doped over a substrate;
forming a nitride semiconductor stacked structure including an electron transit layer and an electron supply layer over the p-type back barrier layer;
forming a source electrode, a drain electrode and a gate electrode over the nitride semiconductor stacked structure;
forming a groove extending to the p-type back barrier layer; and
performing an anneal process for desorbing hydrogen from the p-type back barrier layer through the groove to activate the p-type back barrier layer.
14 . The fabrication method for a semiconductor device according to claim 13 , further comprising providing a hydrogen occlusion alloy in the groove before the anneal process is performed after the groove is formed; wherein
in the performing the anneal process, hydrogen is desorbed from the p-type back barrier layer using the groove and the hydrogen occlusion alloy formed in the groove to activate the hydrogen occlusion alloy.
15 . The fabrication method for a semiconductor device according to claim 14 , wherein the hydrogen, occlusion, allay contains any one of Ti, Zr, Pd and Mg.
16 . The fabrication method for a semiconductor device according to claim 13 , wherein, in the forming the groove, the groove is formed so as to extend from the surface of the nitride semiconductor stacked structure to the p-type back barrier layer.
17 . The fabrication method for a semiconductor device according to claim 13 , wherein, in the forming the groove, the groove is formed in an active region or in the proximity of the active region.
18 . The fabrication method for a semiconductor device according to claim 13 , wherein, in the forming the source electrode, drain electrode and gate electrode, the source electrode or the drain electrode is formed over the groove.
19 . The fabrication method for a semiconductor device according to claim 13 , wherein, in the forming the groove, the groove is formed so as to extend from the back face of the substrate to the p-type back barrier layer.