Behavioural circuit jitter model
View Patent ↗A method of analyzing a transient response of an electronic circuit includes receiving at a jitter modulator circuit first and second input signals, modulating the second input signal on the first input signal in the jitter modulator circuit and outputting a modulated signal based on the first and second input signals. The jitter modulator circuit includes models of N parallel connected transmission lines and modulating includes providing the first input signal, at each of a series of times t, to the N transmission line models and selecting an output of two of the N transmission line models based on the second input. The modulated signal is formed based on the selected outputs of the two N transmission lines models.
1. A method of analyzing a transient response of an electronic circuit, the method comprising:
receiving at a jitter modulator circuit a first input signal and a second input signal, the second input signal being a time varying signal wherein the jitter modulator circuit includes models of N parallel connected transmission lines, each of the transmission lines imparting a different amount of delay onto the first signal;
modulating the second input signal on the first input signal in the jitter modulator circuit, wherein modulating includes selecting an adjacent two of the N transmission line models, wherein the adjacent two of the N transmission line models are selected based on a difference between a maximum and minimum voltage of the second signal;
outputting a modulated signal based on the first and second input signals;
and
determining if the electronic circuit has passed a test based on the modulated signal.
2. The method of claim 1 , wherein modulating includes interpolation between values from the selected two outputs at each of the series of times t.
3. The method of claim 1 , wherein the first input signal is received from a signal source model.
4. The method of claim 1 , wherein the first input signal is received from an s-parameter model.
5. The method of claim 1 , wherein the second input signal is received from a jitter source model.
6. The method of claim 1 , wherein the second input signal is received from a jitter transfer model.
7. The method of claim 1 , wherein at least one of the N transmission line models includes an ideal transmission line model.
8. The method of claim 1 , wherein each of the N transmissions lines delays the first input signal an amount that is a fixed difference from an adjacent one of the N transmission lines.
9. A computer program product comprising a computer readable storage medium having program instructions embodied therewith, the program instructions executable by a processor chip to cause the processor chip to analyze a transient response of an electronic circuit by performing the method of claim 1 .