IP Library Granted Patent US 9,780,232
Granted Patent B2
US 9,780,232 · App. 15/048,791 · Granted Oct 3, 2017

Memory semiconductor device with peripheral circuit multi-layer conductive film gate electrode and method of manufacture

Inventors: Yukio Nishida (Tokyo, JP); Tomohiro Yamashita (Tokyo, JP)
Assignee: RENESAS ELECTRONICS CORPORATION
H01L29/792H01L21/28008H01L21/28282H01L27/11563H01L27/11573H01L29/0653H01L29/42344H01L29/66833
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Quick Facts
Patent No.
US 9,780,232
App. No.
15/048,791
Granted
Oct 3, 2017
Kind
B2
Abstract

To enhance the performance of a semiconductor device. In a method for manufacturing a semiconductor device, a metal film is formed over a semiconductor substrate having an insulating film formed on a surface thereof, and then the metal film is removed in a memory cell region, whereas, in a part of a peripheral circuit region, the metal film is left. Next, a silicon film is formed over the semiconductor substrate, then the silicon film is patterned in the memory cell region, and, in the peripheral circuit region, the silicon film is left so that an outer peripheral portion of the remaining metal film is covered with the silicon film. Subsequently, in the peripheral circuit region, the silicon film, the metal film, and the insulating film are patterned for forming an insulating film portion formed of the insulating film, a metal film portion formed of the metal film, and a conductive film portion formed of the silicon film.

Claims (50)

1. A semiconductor device comprising:

a semiconductor substrate;

a first gate insulating film formed over the semiconductor substrate; and

a first gate electrode formed over the first gate insulating film,

wherein the first gate electrode includes:

a first film portion formed of a first conductive film over the first gate insulating film; and

a second film portion formed of a second conductive film over the first film portion, and

wherein a side surface of one end portion, in the first film portion, in a gate width direction of the first gate electrode is covered with the second film portion.

2. The semiconductor device according to claim 1 , further comprising:

a first active region formed in a first region on a first principal surface side of the semiconductor substrate; and

a first element isolating region which is formed in the first region on the first principal surface side of the semiconductor substrate and which defines the first active region,

wherein the first gate insulating film is formed over the first active region, and

wherein the one end portion, in the first film portion, in the gate width direction is arranged over the first element isolating region.

3. The semiconductor device according to claim 1 ,

wherein the first gate insulating film is formed in a first region on a first principal surface side of the semiconductor substrate, the semiconductor device further comprising:

a second gate insulating film formed over the semiconductor substrate in a second region on the first principal surface side of the semiconductor substrate;

a second gate electrode formed over the second gate insulating film;

a third gate electrode which is formed over the semiconductor substrate in the second region and which is adjacent to the second gate electrode; and

a first insulating film which is formed between the third gate electrode and the semiconductor substrate and between the second gate electrode and the third gate electrode, and which has a charge storage section therein.

4. The semiconductor device according to claim 3 ,

wherein the semiconductor device comprises a nonvolatile memory formed in the second region on the first principal surface side of the semiconductor substrate, and

wherein the second gate electrode and the third gate electrode are gate electrodes constituting the nonvolatile memory.

5. A semiconductor device comprising:

a semiconductor substrate;

a first gate insulating film formed over the semiconductor substrate;

a first gate electrode formed over the first insulating film; and

a sidewall spacer formed over a side of the first gate electrode,

wherein the first gate electrode includes a first conductive film over the first insulating film and a second conductive film over the first conductive film,

wherein, as viewed in a cross section, the first conductive film has a first end portion and a second end portion opposite to the first end portion, and

wherein, as viewed in the cross section, a side surface of the first end portion of the first conductive film is covered with the second conductive film.

6. The semiconductor device according to claim 5 ,

wherein, the side surface of the first end portion of the first conductive film is in contact with the second conductive film.

7. The semiconductor device according to claim 6 ,

wherein the first conductive film includes a titanium nitride film, a tantalum nitride film, a tungsten nitride film, a titanium carbide film, a tantalum carbide film, a tungsten carbide film, a tantalum carbide nitride film, or a tungsten film, and

wherein the second conductive film includes a silicon film.

8. The semiconductor device according to claim 7 , further comprising:

a first active region formed in a first region on a main surface side of the semiconductor substrate; and

a field isolation oxide region which is formed in the first region on the main surface side of the semiconductor substrate and which defines the first active region,

wherein the first gate insulating film is formed over the first active region, and

wherein the first end portion of the first conductive film is arranged over the field isolation oxide region.

9. The semiconductor device according to claim 7 ,

wherein the first gate insulating film is formed in a first region on a main surface side of the semiconductor substrate, the semiconductor device further comprising:

a second gate insulating film formed over the semiconductor substrate in a second region on the main surface side of the semiconductor substrate;

a second gate electrode formed over the second gate insulating film;

a third gate electrode which is formed over the semiconductor substrate in the second region and which is adjacent to the second gate electrode via a first insulating film; and

the first insulating film which is formed between the third gate electrode and the semiconductor substrate and between the second gate electrode and the third gate electrode, and which has a charge storage portion therein.

10. The semiconductor device according to claim 9 ,

wherein the second gate electrode and the third gate electrode are gate electrodes constituting a nonvolatile memory.

11. The semiconductor device according to claim 5 , wherein the second conductive film separates the first end portion of the first conductive film and the sidewall spacer from each other.

12. The semiconductor device according to claim 1 , wherein the second film portion directly contacts the first gate insulating film.

Assignments (1)
CHANGE OF ADDRESS OF ASSIGNEE Recorded Jun 1, 2018
From: RENESAS ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 045984/0759 →
Priority Claims (1)
JP 2013-034248 · Feb 25, 2013 · national
Continuity (2)
Division 14188131 · Feb 24, 2014
Related Publication 20160172509A1 · Jun 16, 2016