IP Library › Granted Patent US 9,941,263
Granted Patent B2
US 9,941,263 · App. 15/052,521 · Granted Apr 10, 2018

Semiconductor integrated circuit device

Inventor: Hiroyuki Shimbo (Kyoto, JP)
Assignee: SOCIONEXT INC.
H01L27/0207H01L23/528H01L29/6681H01L21/823821H01L27/0886H01L27/0924H01L27/1211H01L2924/0002
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Quick Facts
Patent No.
US 9,941,263
App. No.
15/052,521
Granted
Apr 10, 2018
Kind
B2
Abstract

Disclosed herein is a semiconductor integrated circuit device which includes a standard cell with a plurality of fins extending in a first direction and arranged in a second direction that is perpendicular to the first direction. An active fin of the fins forms part of an active transistor. A dummy fin of the fins is disposed between the active fin and an end of the standard cell.

Claims (8)

1. A semiconductor integrated circuit device comprising:

a first cell row comprised of standard cells arranged in a first direction; and

a second cell row comprised of standard cells arranged in the first direction, and disposed adjacent to the first cell row in a second direction that is perpendicular to the first direction, wherein

the first cell row comprises:

a first standard cell having fins extending in the first direction and including an active transistor with a fin structure, the active transistor having at least one of the fins and a gate line extending in the second direction; and

a second standard cell which is a TAP cell having a function of fixing a substrate potential, the second standard cell being adjacent to the first standard cell in the first direction, and including fins extending in the first direction, and

the first standard cell has a first fin disposed closest to a cell row boundary between the first and second cell rows, and the second standard cell has a dummy fin disposed at the same position in the second direction as the first fin and a diffusion region supplied with power and disposed at a position farther from the cell row boundary than the dummy fin in the second direction.

2. The semiconductor integrated circuit device of claim 1 , wherein the second standard cell has a power supply line disposed at the cell row boundary and supplying the diffusion region with power.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 24, 2016
From: SHIMBO, HIROYUKI
To: SOCIONEXT INC.
Reel/Frame 037818/0021 →
Priority Claims (1)
JP 2013-177182 · Aug 28, 2013 · national
Continuity (2)
Continuation PCTJP2014002236 · Apr 21, 2014
Related Publication 20160172351A1 · Jun 16, 2016