IP Library Granted Patent US 9,837,353
Granted Patent B2
US 9,837,353 · App. 15/058,077 · Granted Dec 5, 2017

Middle end-of-line strap for standard cell

Inventors: Meng-Hung Shen (Hsinchu County, TW); Chih-Liang Chen (Hsinchu, TW); Charles Chew-Yuen Young (Cupertino, CA); Jiann-Tyng Tzeng (Hsinchu, TW); Kam-Tou Sio (Hsinchu County, TW); Wei-Cheng Lin (Taichung, TW)
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
H01L23/528H01L21/762H01L21/76877H01L21/76895H01L23/5226H01L29/42356H01L29/66795H01L27/0207H01L29/785H01L2924/01029
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Quick Facts
Patent No.
US 9,837,353
App. No.
15/058,077
Granted
Dec 5, 2017
Kind
B2
Abstract

A semiconductor structure is disclosed that includes a semiconductor structure includes an active area, a first conductive line, a conductive via, a first conductive metal segment coupled to the conductive line through the conductive via, a second conductive metal segment disposed over the active area, and a local conductive segment configured to couple the first conductive metal segment and the second conductive metal segment.

Claims (62)

1. A semiconductor structure, comprising:

a first active area;

a first conductive line;

a first conductive via;

a second conductive via;

a first conductive metal segment electrically coupled to the first conductive line through the first conductive via;

a second conductive metal segment disposed over the first active area and electrically coupled to the first conductive line through the second conductive via; and

a first conductive segment configured to electrically couple the first conductive metal segment and the second conductive metal segment,

wherein the first conductive line and the first conductive segment are disposed at two sides of the first conductive via respectively.

2. The semiconductor structure of claim 1 , further comprising:

a gate disposed over the first active area and disposed under the first conductive segment.

3. The semiconductor structure of claim 2 , wherein the gate is disposed between the first conductive metal segment and the second conductive metal segment.

4. The semiconductor structure of claim 2 , wherein a height of the first conductive segment plus a height of the gate is substantially equal to a height of the second conductive metal segment.

5. The semiconductor structure of claim 1 , wherein a height of the first conductive metal segment is greater than a height of the second conductive metal segment.

6. The semiconductor structure of claim 1 , wherein a current path is formed from the first conductive line through the second conductive via to the second conductive metal segment, and another current path is formed from the first conductive line through the first conductive via, the first conductive metal segment and the first conductive segment to the second conductive metal segment.

7. The semiconductor structure of claim 1 , further comprising:

a second active area;

a second conductive line;

a third conductive via;

a fourth conductive via;

a third conductive metal segment electrically coupled to the second conductive line through the third conductive via;

a fourth conductive metal segment disposed over the second active area and electrically coupled to the second conductive line through the fourth conductive via; and

a second conductive segment configured to electrically couple the third conductive metal segment and the fourth conductive metal segment.

8. A semiconductor structure, comprising:

an active area;

a first conductive line;

a conductive via;

a first conductive metal segment electrically coupled to the first conductive line through the conductive via;

a second conductive metal segment disposed over the active area; and

a conductive segment configured to electrically couple the first conductive metal segment and the second conductive metal segment,

wherein the first conductive line and the conductive segment are disposed at two sides of the conductive via respectively.

9. The semiconductor structure of claim 8 , further comprising:

a gate disposed over the active area and disposed under the conductive segment.

10. The semiconductor structure of claim 9 , wherein the gate is disposed between the first conductive metal segment and the second conductive metal segment.

11. The semiconductor structure of claim 8 , wherein a height of the first conductive metal segment is greater than a height of the second conductive metal segment.

12. The semiconductor structure of claim 8 , wherein a length of the second conductive metal segment is shorter than a length of the first conductive metal segment.

13. The semiconductor structure of claim 8 , wherein a current path is formed from the first conductive line through the conductive via, the first conductive metal segment and the conductive segment, to the second conductive metal segment.

14. The semiconductor structure of claim 8 , wherein one end of the conductive via is in contact with the first conductive line, and another end of the conductive via is in contact with a portion of the first conductive metal segment and one end of the conductive segment.

15. The semiconductor structure of claim 14 , further comprising:

an isolation segment disposed over the second conductive metal segment for isolating the first conductive line from a second conductive line.

16. A semiconductor structure, comprising:

a first active area;

a first conductive line;

a first conductive via;

a second conductive via;

a first conductive metal segment electrically coupled to the first conductive line through the first conductive via;

a second conductive metal segment disposed over the first active area and electrically coupled to the first conductive line through the second conductive via;

a first conductive segment configured to electrically couple the first conductive metal segment and the second conductive metal segment; and

a gate disposed over the first active area and disposed under the first conductive segment,

wherein a height of the first conductive metal segment is greater than a height of the second conductive metal segment,

wherein the first conductive line and the first conductive segment are disposed at two sides of the first conductive via respectively.

17. The semiconductor structure of claim 16 , wherein the gate is disposed between the first conductive metal segment and the second conductive metal segment.

18. The semiconductor structure of claim 16 , wherein a height of the first conductive segment plus a height of the gate is substantially equal to a height of the second conductive metal segment.

19. The semiconductor structure of claim 16 , wherein a current path is formed from the first conductive line through the second conductive via to the second conductive metal segment, and another current path is formed from the first conductive line through the first conductive via, the first conductive metal segment, and the first conductive segment to the second conductive metal segment.

20. The semiconductor structure of claim 16 , further comprising:

a second active area;

a second conductive line;

a third conductive via;

a fourth conductive via;

a third conductive metal segment electrically coupled to the second conductive line through the third conductive via;

a fourth conductive metal segment disposed over the second active area and electrically coupled to the second conductive line through the fourth conductive via; and

a second conductive segment configured to electrically couple the third conductive metal segment and the fourth conductive metal segment.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 3, 2016
From: SHEN, MENG-HUNG; CHEN, CHIH-LIANG; YOUNG, CHARLES CHEW-YUEN; TZENG, JIANN-TYNG; SIO, KAM-TOU; LIN, WEI-CHENG
To: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Reel/Frame 037888/0507 →
Continuity (1)
Related Publication 20170256484A1 · Sep 7, 2017