IP Library › Granted Patent US 9,905,529
Granted Patent B2
US 9,905,529 · App. 15/058,282 · Granted Feb 27, 2018

Method for manufacturing semiconductor device

Inventors: Kenji Sakata (Tokyo, JP); Tsuyoshi Kida (Tokyo, JP); Yoshihiro Ono (Tokyo, JP)
Assignee: RENESAS ELECTRONICS CORPORATION
H01L24/81H01L24/16H01L24/27H01L24/75H01L24/92H01L25/0652H01L24/13H01L24/29H01L24/32H01L24/83H01L2224/1146H01L2224/11849H01L2224/131H01L2224/13082H01L2224/16238H01L2224/2732H01L2224/27436H01L2224/73104H01L2224/73204H01L2224/7565H01L2224/75251H01L2224/75305H01L2224/75745H01L2224/8121H01L2224/81022H01L2224/8183H01L2224/81132H01L2224/81191H01L2224/81203H01L2224/81355H01L2224/81444H01L2224/81815H01L2224/81862H01L2224/81986H01L2224/83191H01L2224/83192H01L2224/83862H01L2224/9205H01L2224/92125H01L2224/97
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Quick Facts
Patent No.
US 9,905,529
App. No.
15/058,282
Granted
Feb 27, 2018
Kind
B2
Abstract

A method for manufacturing a semiconductor device includes the steps of mounting a Si interposer over a printed wiring substrate, plasma-cleaning an upper surface of the Si interposer, disposing an NCF over the upper surface of the Si interposer, and mounting a semiconductor chip over the upper surface of the Si interposer through the NCF. Also, the method includes the step of electrically coupling each of plural electrodes of a second substrate and each of plural electrode pads of the semiconductor chip with each other through plural bump electrodes by reflow, and the surface of the Si interposer is plasma-cleaned before attaching the NCF to the Si interposer.

Claims (43)

1. A method for manufacturing a semiconductor device, comprising the steps of:

before the step (a), baking the chip support substrate;

(a) plasma-cleaning an upper surface of the chip support substrate that includes the upper surface where a plurality of electrodes are formed and a lower surface on the opposite side of the upper surface;

(b) after the step (a), disposing an insulative adhesive over the upper surface of the chip support substrate;

between the step (b) and the step (c), baking the insulative adhesive;

(c) after the step (b), mounting a semiconductor chip on the upper surface of the chip support substrate through the insulative adhesive; and

(d) after the step (c), heating the chip support substrate mounted with the semiconductor chip and the insulative adhesive by reflow, and electrically coupling each of the electrodes of the chip support substrate and each of a plurality of electrode pads of the semiconductor chip with each other through a plurality of bump electrodes,

wherein, in the step (d), each of the electrodes and each of the electrode pads are electrically coupled with each other through the bump electrodes in a state the insulative adhesive is disposed around each of the bump electrodes, and

wherein, in the step of baking the insulative adhesive, the insulative adhesive is baked at a temperature lower than a bake temperature of the chip support substrate in the step of baking the chip support substrate.

2. The method for manufacturing a semiconductor device according to claim 1 ,

wherein, in the step of baking the insulative adhesive, the insulative adhesive is baked within a time shorter than a bake time of the chip support substrate in the step of baking the chip support substrate.

3. The method for manufacturing a semiconductor device according to claim 1 ,

wherein, in the step (c), the semiconductor chip and the chip support substrate are positioned with each other recognizing marks formed outside the insulative adhesive of the upper surface of the chip support substrate.

4. The method for manufacturing a semiconductor device according to claim 1 ,

wherein, in the step (c), after positioning the semiconductor chip and the chip support substrate with each other, solder coated at each distal end of the bump electrodes is heated and deformed at a temperature lower than the melting point of the solder, and each of the electrodes is dented into the respective solder.

5. The method for manufacturing a semiconductor device according to claim 4 ,

wherein Au plating is formed over the surface of each of the electrodes of the chip support substrate, and the Au plating and the solder are coupled with each other.

6. A method for manufacturing a semiconductor device, comprising the steps of:

(a) mounting a second substrate over a first substrate with the second substrate including an upper surface where a plurality of electrodes are formed and a lower surface on the opposite side of the upper surface;

(b) after the step (a), baking the first substrate;

(c) after the step (b), plasma-cleaning the upper surface of the second substrate;

(d) after the step (c), disposing an insulative adhesive over the upper surface of the second substrate;

between the step (d) and the step (e), baking the insulative adhesive;

(e) after the step (d), mounting a semiconductor chip over the upper surface of the second substrate through the insulative adhesive; and

(f) after the step (e), heating the second substrate mounted with the semiconductor chip and the insulative adhesive by reflow, and electrically coupling each of the electrodes of the second substrate and each of a plurality of electrode pads of the semiconductor chip with each other through a plurality of bump electrodes,

wherein in the step (f), each of the electrodes and each of the electrode pads are electrically coupled with each other through the bump electrodes in a state the insulative adhesive is disposed around each of the bump electrodes, and

wherein, in the step of baking the insulative adhesive, the insulative adhesive is baked at a temperature lower than a bake temperature of the first substrate in the step (b).

7. The method for manufacturing a semiconductor device according to claim 6 ,

wherein, in the step of baking the insulative adhesive, the insulative adhesive is baked within a time shorter than a bake time of the first substrate in the step (b).

8. The method for manufacturing a semiconductor device according to claim 6 ,

wherein, in the step (e), the semiconductor chip and the second substrate are positioned with each other recognizing marks formed outside the insulative adhesive of the upper surface of the second substrate.

9. The method for manufacturing a semiconductor device according to claim 6 ,

wherein, in the step (e), after positioning the semiconductor chip and the second substrate with each other, solder coated at each distal end of the bump electrodes is heated and deformed at a temperature lower than the melting point of the solder, and each of the electrodes is dented into the respective solder.

10. The method for manufacturing a semiconductor device according to claim 9 ,

wherein Au plating is formed over the surface of each of the electrodes of the second substrate, and the Au plating and the solder are coupled with each other.

11. The method for manufacturing a semiconductor device according to claim 6 ,

wherein, in the step (e), the semiconductor chip is absorbed and held by an absorbing surface of a head of a flip chip bonder, and the semiconductor chip is mounted on the upper surface of the second substrate, and

wherein the plane size of the absorbing surface of the head is equal to or smaller than the plane size of the semiconductor chip.

12. The method for manufacturing a semiconductor device according to claim 6 ,

wherein the second substrate is a substrate formed of silicon, and

wherein each of the bump electrodes is a columnar electrode formed of an alloy with the main composition of Cu.

13. The method for manufacturing a semiconductor device according to claim 6 ,

wherein the plasm-cleaning in the step (c) is executed by generating plasma by argon gas or oxygen.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 2, 2016
From: SAKATA, KENJI; KIDA, TSUYOSHI; ONO, YOSHIHIRO
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 037869/0217 →
Priority Claims (1)
JP 2015-043085 · Mar 5, 2015 · national
Continuity (1)
Related Publication 20160260680A1 · Sep 8, 2016