Three dimensional vertical channel semiconductor memory device
View Patent ↗According to one embodiment, a semiconductor memory device includes a stacked body, a semiconductor pillar, a memory film and a conductive member. The stacked body includes a plurality of electrode layers arranged in a first direction. The semiconductor pillar extends in the stacked body in the first direction. The memory film provides between the stacked body and the semiconductor pillar. The conductive member includes a contact and an interconnect. The contact includes metal, the contact extending in the stacked body in the first direction. The interconnect extends in a second direction crossing the first direction, and the interconnect including metal.
1. A semiconductor memory device, comprising:
a substrate;
a stacked body provided on the substrate, the stacked body including a plurality of electrode layers arranged in a first direction;
a semiconductor pillar extending in the stacked body in the first direction;
a memory film provided between the stacked body and the semiconductor pillar;
a first insulating film extending in the stacked body in the first direction and a second direction crossing the first direction; and
a conductive member including a contact and an interconnect, the contact including metal, the contact extending in the first insulating film in the first direction, the interconnect provided between the substrate and the stacked body, the interconnect extending in the second direction, the interconnect including metal, the interconnect being electrically connected to the contact,
a first length of the first insulating film in a third direction being greater than a second length of the interconnect in the third direction, the third direction crossing the first direction and the second direction,
at least a portion of the contact overlapping a portion of the interconnect in the first direction,
a portion of the first insulating film overlapping the portion of the interconnect in the first direction;
an insulating layer provided between the substrate and the stacked body;
a back gate electrode film provided between the stacked body and the insulating layer; and
a connecting member extending in the back gate electrode film in the second direction and a third direction, and the connecting member including a semiconductor material, the connecting member being electrically connected to the semiconductor pillar and the interconnect, the third direction crossing the first direction and the second direction,
at least a portion of the interconnect and at least a portion of the connecting member overlapping each other in a direction crossing the first direction.
2. The device according to claim 1 , further comprising:
a second insulating film provided between the interconnect and the insulating layer, the second insulating film extending in the second direction, wherein
at least a portion of the second insulating film overlapping at least a portion of the back gate electrode film in a direction crossing the first direction.
3. A semiconductor memory device, comprising:
a substrate;
a stacked body provided on the substrate, the stacked body including a plurality of electrode layers arranged in a first direction;
a semiconductor pillar extending in the stacked body in the first direction;
a memory film provided between the stacked body and the semiconductor pillar;
a first insulating film extending in the stacked body in the first direction and the second direction crossing the first direction; and
a conductive member including a contact and an interconnect, the contact including metal, the contact extending in the first insulating film in the first direction, the interconnect provided between the substrate and the stacked body, the interconnect extending in the second direction, the interconnect including metal, the interconnect being electrically connected to the contact;
a first length of the first insulating film in a third direction being greater than a second length of the interconnect in the third direction, the third direction crossing the first direction and the second direction,
the first insulating film including a first insulating portion and two of second insulating portions,
the first insulating portion being provided between the two of the second insulating portions in the second direction,
the two of second insulating portions being connected through the first insulating portion, and
the contact extending in the first insulating portions in the first direction.
4. The device according to claim 3 , wherein
a length of the first insulating portion in the third direction is greater than a length of the second insulating portions in the third direction.
5. The device according to claim 3 , further comprising:
an insulating layer provided between the substrate and the stacked body;
a back gate electrode film provided between the stacked body and the insulating layer; and
a connecting member extending in the back gate electrode film in the second direction and a third direction, and the connecting member including a semiconductor material, the connecting member being electrically connected to the semiconductor pillar and the interconnect, the third direction crossing the first direction and the second direction,
at least a portion of the interconnect and at least a portion of the connecting member overlapping each other in a direction crossing the first direction.
6. The device according to claim 5 , further comprising:
a second insulating film provided between the interconnect and the insulating layer, the second insulating film extending in the second direction, wherein
at least a portion of the second insulating film overlaps at least a portion of the back gate electrode film in a direction crossing the first direction.
7. The device according to claim 3 , wherein
at least a portion of the substrate overlaps at least a portion of the interconnect in a direction crossing the first direction.
8. A semiconductor memory device, comprising:
a stacked body including a plurality of first electrode layers and a plurality of first insulating layers, each of the first insulating layers being provided between the first electrode layers respectively;
a second electrode layer provided below the stacked body via a second insulating layer, the second electrode layer being thicker than a first electrode layer of the first electrode layers;
a channel body extending in a stacking direction of the stacked body and including a first part and a second part, the first part penetrating the stacked body and the second electrode layer, the second part being located below the first part;
a memory film provided so as to cover at least an outer peripheral side surface of the first part;
a silicon containing member in contact with an outer peripheral side surface of the second part, the silicon containing member including a first portion provided below the second electrode layer via an insulating film and a second portion provided below a trench formed through the stacked body and the second electrode layer; and
a metal containing portion electrically connected to the silicon containing member, the metal containing portion extending in a direction orthogonal to the stacking direction below the trench,
the channel body being electrically connected to a source line via the silicon containing member.
9. The device according to claim 8 , wherein
the first electrode layers are formed of a conductive material containing tungsten,
the second electrode layer is formed of a silicon containing an impurity.
10. The device according to claim 8 , wherein
the silicon containing member spreads in a plate shape along a plane orthogonal to the stacking direction.