Semiconductor device strain relaxation buffer layer
A method for forming a semiconductor device comprises forming a first buffer layer with a first melting point on a substrate. A second buffer layer is formed on the first buffer layer. The second buffer layer has a second melting point that is greater than the first melting point. Annealing process is performed that increases a temperature of the first buffer layer such that the first buffer layer partially liquefies and causes a strain in the second buffer layer to be substantially reduced.
1. A method for forming a semiconductor device, the method comprising:
forming a first buffer layer on a substrate, the first buffer layer having a first melting point; forming a second buffer layer on the first buffer layer, the second buffer layer having a second melting point, the second melting point greater than the first melting point; performing an annealing process that increases a temperature of the first buffer layer such that the first buffer layer partially liquefies and causes a strain in the second buffer layer to substantially be reduced; wherein the annealing process increases the temperature of the first buffer layer such that the temperature is at least equal to the first melting point and less than the second melting point;
cooling the first buffer layer below the first melting point;
forming a layer of a first semiconductor material on the second buffer layer; and
forming a gate stack on the first semiconductor material.
2. The method of claim 1 , further comprising removing a portion of the second buffer layer and the first buffer layer to expose a portion of the substrate and form a first portion of the second buffer layer and a second portion of the second buffer layer prior to performing the annealing process, wherein the layer of the first semiconductor material is formed on the first portion of the second buffer layer.
3. The method of claim 2 , further comprising forming a layer of a second semiconductor material on the second portion of the second buffer layer following the forming the layer of the first semiconductor material.
4. The method of claim 1 , wherein the second buffer layer includes a first crystalline material.
5. The method of claim 1 , wherein the first buffer layer includes a second crystalline material.
6. A method for forming an active region of a semiconductor device, the method comprising:
forming a first buffer layer on a substrate, the first buffer layer having a first melting point;
forming a second buffer layer on the first buffer layer, the second buffer layer having a second melting point, the second melting point greater than the first melting point; and
performing an annealing process that increases a temperature of the first buffer layer such that the first buffer layer partially liquefies and causes a strain in the second buffer layer to substantially be reduced; wherein the annealing process increases the temperature of the first buffer layer such that the temperature is at least equal to the first melting point and less than the second melting point.
7. The method of claim 6 , further comprising:
cooling the first buffer layer below the first melting point; and
forming a layer of a first semiconductor material on a first portion of the second buffer layer.
8. The method of claim 7 , further comprising forming a layer of a second semiconductor material on a second portion of the second buffer layer.
9. The method of claim 6 , wherein the second buffer layer includes a first crystalline material.
10. The method of claim 6 , wherein the first buffer layer includes a second crystalline material.
11. The method of claim 6 , wherein the first buffer layer is formed on the substrate by an epitaxial growth process.
12. The method of claim 6 , wherein the second buffer layer is formed on the first buffer layer by an epitaxial growth process.
13. The method of claim 6 , further comprising forming a hardmask layer on the second buffer layer prior to performing the annealing process.
14. The method of claim 6 , wherein the first buffer layer includes germanium and the second buffer layer includes silicon germanium.
15. The method of claim 6 , further comprising removing a portion of the second buffer layer and the first buffer layer to expose a portion of the substrate prior to performing the annealing process.