Contacts having a geometry to reduce resistance

1. A method of increasing the surface area of a contact to an electrical device comprising:

forming a contact stud extending through an intralevel dielectric layer to a component of the electrical device;

selectively forming a contact region of metal on an upper surface of the contact stud that is coplanar with an upper surface of the intralevel dielectric layer, wherein the selectively formed contact region has an exterior surface defined by a curvature and has a surface area that is greater than a surface area of the upper surface of the contact stud, the selective forming method including saturating the contact region with hydrogen and directly depositing the contact region of the metal of the contact region without depositing the metal on the intralevel dielectric; and

forming an interlevel dielectric layer on the intralevel dielectric layer, wherein an interlevel contact extends through the interlevel dielectric layer into direct contact with the selectively formed contact region.

2. The method of claim 1 , wherein the component of the electrical device comprises a field effect transistor, a metal oxide semiconductor field effect transistor, a fin field effect transistor, a memory device, a resistor, a capacitor or a combination thereof.

3. The method of claim 1 , wherein said forming the contact stud comprises:

depositing the intralevel dielectric layer on the component of the electrical device;

forming a via opening through the intralevel dielectric to a contact portion of the component;

forming a metal liner on the sidewalls of the via opening; and

filling the via opening with a conductive material for the first contact portion.

4. The method of claim 1 , wherein said selectively forming the contact region on the upper surface of the contact stud that is coplanar with the upper surface of the intralevel dielectric layer comprises chemical vapor deposition or atomic layer deposition.