IP Library Granted Patent US 9,691,847
Granted Patent B2
US 9,691,847 · App. 15/077,213 · Granted Jun 27, 2017

Self-formation of high-density arrays of nanostructures

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Quick Facts
Patent No.
US 9,691,847
App. No.
15/077,213
Granted
Jun 27, 2017
Kind
B2
Abstract

A method for forming nanostructures includes bonding a flexible substrate to a crystalline semiconductor layer having a two-dimensional material formed on a side opposite the flexible substrate. The crystalline semiconductor layer is stressed in a first direction to initiate first cracks in the crystalline semiconductor layer. The first cracks are propagated through the crystalline semiconductor layer and through the two-dimensional material. The stress of the crystalline semiconductor layer is released to provide parallel structures including the two-dimensional material on the crystalline semiconductor layer.

Claims (10)

1. A semiconductor device, comprising:

a crystalline semiconductor layer, the crystalline semiconductor layer being cracked to form parallel structures along at least one direction; and

a two-dimensional material formed on the crystalline semiconductor layer being separated at cracks in the crystalline semiconductor layer to form nanostructures.

2. The device as recited in claim 1 , wherein the cracks are spaced by an intercrack distance which is proportional to an applied strain during crack propagation.

3. The device as recited in claim 1 , wherein the two-dimensional material includes graphene.

4. The device as recited in claim 1 , wherein the crystalline semiconductor layer includes SiC.

5. The device as recited in claim 1 , further comprising second cracks formed transversely to the cracks along the at least one direction.

6. The device as recited in claim 5 , wherein the second cracks are formed through the crystalline semiconductor layer and through the two-dimensional material.

7. The device as recited in claim 6 , wherein the second cracks in combination with the first cracks provide dot structures including the two-dimensional material on the crystalline semiconductor layer.

8. The device as recited in claim 1 , further comprising: an electronic or photonic device formed by incorporating the parallel structures.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 11, 2020
From: INTERNATIONAL BUSINESS MACHINES CORPORATION
To: ELPIS TECHNOLOGIES INC.
Reel/Frame 052620/0961 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 22, 2016
From: DIMITRAKOPOULOS, CHRISTOS D.; KIM, JEEHWAN; PARK, HONGSIK; SHIN, BYUNGHA
To: INTERNATIONAL BUSINESS MACHINES CORPORATION
Reel/Frame 038067/0500 →