Semiconductor memory device with contact plugs extending inside contact connection portions
View Patent ↗According to an embodiment, a semiconductor memory device includes a plurality of first conductive layers disposed above a substrate in a laminating direction. A stepped wiring area includes a second conductive layer electrically connected to the first conductive layer. The second conductive layer has an end portion as a contact connection portion. A contact plug is connected to the contact connection portion. The contact plug extends in the laminating direction. The contact plug includes a first member and a second member. The first member extends in the laminating direction. The second member extends in a direction intersecting with the laminating direction inside the contact connection portion.
1. A semiconductor memory device, comprising:
a plurality of first conductive layers disposed above a substrate in a laminating direction;
a wiring portion that includes a second conductive layer electrically connected to the first conductive layer, the second conductive layer having an end portion as a contact connection portion; and
a contact plug connected to the contact connection portion, the contact plug including a first member that extends in the laminating direction and a second member that extends in a direction intersecting with the laminating direction inside the contact connection portion;
a first barrier metal film being disposed between the contact plug and the second conductive layer:
a second barrier metal film that covers a peripheral area of the second conductive layer; and
an insulating film that covers the peripheral area of the second conductive layer via the second barrier metal film, wherein
an end portion of the second barrier metal film is at a position retreated compared with an end portion of the insulating film viewed from the contact plug.
2. The semiconductor memory device according to claim 1 , wherein
the first barrier metal film is disposed at peripheral areas of the first member and the second member, while the first barrier metal film is not disposed at a portion where the first member connects to the second member.
3. The semiconductor memory device according to claim 1 , wherein
at least a part of the second member is constituted of two layers of first barrier metal films, the first barrier metal films being in contact with one another in the laminating direction.
4. The semiconductor memory device according to claim 1 , wherein
the first barrier metal film has a level difference in the laminating direction near the end portion of the second barrier metal film.
5. The semiconductor memory device according to claim 1 , wherein
the second member has a length along a longitudinal direction greater than a diameter of a lower end of the first member.
6. The semiconductor memory device according to claim 1 , wherein
the first member and the second member are made of an identical material.
7. The semiconductor memory device according to claim 1 , wherein
the wiring portion includes a stepped shape portion, the stepped shape portion having end portions of the second conductive layers, the end portions having positions different from one another in a longitudinal direction.
8. The semiconductor memory device according to claim 7 , wherein
diameters of lower ends of the plurality of contact plugs becomes smaller as positions thereof in the laminating direction lowers.
9. The semiconductor memory device according to claim 7 , wherein
the first barrier metal film is disposed at peripheral areas of the first member and the second member, the first barrier metal film being absent at a portion where the first member connects to the second member.
10. The semiconductor memory device according to claim 7 , wherein
at least a part of the second member is constituted of two layers of first barrier metal films, the first barrier metal films being in contact with one another in the laminating direction.