IGBT having deep gate trench
View Patent ↗There are disclosed herein various implementations of an insulated-gate bipolar transistor (IGBT) with buried depletion electrode. Such an IGBT may include a collector at a bottom surface of a semiconductor substrate, a drift region having a first conductivity type situated over the collector, and a base layer having a second conductivity type opposite the first conductivity type situated over the drift region. The IGBT also includes a plurality of deep insulated trenches with a buried depletion electrode and at least one gate electrode disposed therein. In addition, the IGBT includes an active cell including an emitter adjacent the gate electrode, and an implant zone, situated between adjacent deep insulated trenches. The implant zone is formed below the base layer and has the first conductivity type. In one implementation, the IGBT may also include a dummy cell neighboring the active cell.
1. An insulated-gate bipolar transistor (IGBT) in a semiconductor substrate, said IGBT comprising:
a collector at a bottom surface of said semiconductor substrate, a drift region having a first conductivity type situated over said collector, and a base layer having a second conductivity type opposite said first conductivity type situated over said drift region;
a plurality of deep insulated trenches extending from a semiconductor surface above said base layer to a depth of greater than six micrometers (6.0 μm) to terminate in said drift region;
each of said deep insulated trenches having buried depletion electrode and at least one gate electrode disposed therein, said buried depletion electrode reaching deeper into said deep insulated trench than said at least one gate electrode;
an active cell including an emitter adjacent said at least one gate electrode, and an implant zone, situated between adjacent deep insulated trenches;
said implant zone being formed below said base layer and having said first conductivity type;
a dummy cell neighboring said active cell, said dummy cell not having an emitter formed therein, and wherein said implant zone does not extend to said dummy cell.
2. The IGBT of claim 1 , wherein said buried depletion electrode comprises doped polysilicon.
3. The IGBT of claim 1 , wherein said buried depletion electrode is shorted to said emitter of said IGBT.
4. The IGBT of claim 1 , wherein said buried depletion electrode is shorted to said at least one gate electrode.
5. The IGBT of claim 1 , wherein said dummy cell includes at least one deep insulated trench with a respective buried depletion electrode disposed therein.
6. The IGBT of claim 1 , wherein said dummy cell includes a region having said second conductivity type, but having a depth deeper than said base layer.
7. The IGBT of claim 1 , wherein said base layer extends to said dummy cell.
8. The IGBT of claim 1 , wherein said base layer is not formed in said dummy cell.
9. The IGBT of claim 1 , wherein said at least one gate electrode is merged with said buried depletion electrode.
10. The IGBT of claim 1 , further comprising a buffer layer of said first conductivity type formed between said drift region and said collector.
11. An insulated-gate bipolar transistor (IGBT) in a semiconductor substrate, said IGBT comprising:
a collector at a bottom surface of said semiconductor substrate, a drift region having a first conductivity type situated over said collector, and a base layer having a second conductivity type opposite said first conductivity type situated over said drift region;
a plurality of deep insulated trenches extending from a semiconductor surface above said base layer to a depth of greater than six micrometers (6.0 μm) to terminate in said drift region;
each of said deep insulated trenches having a buried depletion electrode and at least one gate electrode disposed therein, said buried depletion electrode reaching deeper into said deep insulated trench than said at least one gate electrode;
an active cell including an emitter adjacent said at least one gate electrode, and an implant zone, situated between adjacent deep insulated trenches;
said implant zone being formed below said base layer and having said first conductivity type;
wherein said buried depletion electrode is situated below and electrically insulated from said at least one gate electrode.
12. The IGBT of claim 11 , wherein said buried depletion electrode comprises doped polysilicon.
13. The IGBT of claim 11 , wherein said buried depletion electrode is shorted to said emitter of said IGBT.
14. The IGBT of claim 11 , wherein said buried depletion electrode is shorted to said at least one gate electrode.
15. The IGBT of claim 11 , further comprising a dummy cell neighboring said active cell, said dummy cell not having an emitter formed therein, wherein said implant zone does not extend to said dummy cell wherein said dummy cell includes at least one deep insulated trench with a respective buried depletion electrode disposed therein.
16. The IGBT of claim 11 , further comprising a dummy cell neighboring said active cell, said dummy cell not having an emitter formed therein, wherein said implant zone does not extend to said dummy cell, wherein said dummy cell includes a region having said second conductivity type, but having a depth deeper than said base layer.
17. The IGBT of claim 11 , further comprising a dummy cell neighboring said active cell, said dummy cell not having an emitter formed therein, wherein said implant zone does not extend to said dummy cell, wherein said base layer extends to said dummy cell.
18. The IGBT of claim 11 , further comprising a dummy cell neighboring said active cell, said dummy cell not having an emitter formed therein, wherein said implant zone does not extend to said dummy cell, wherein said base layer is not formed in said dummy cell.
19. The IGBT of claim 11 , wherein said at least one gate electrode is merged with said buried depletion electrode.
20. The IGBT of claim 11 , further comprising a buffer layer of said first conductivity type formed between said drift region and said collector.