IP Library › Granted Patent US 9,722,042
Granted Patent B2
US 9,722,042 · App. 15/079,227 · Granted Aug 1, 2017

Group-III nitride semiconductor device and method for fabricating the same

Inventor: Wen-Jang Jiang (Hsinchu, TW)
H01L29/66462H01L21/8236H01L21/8252H01L23/291H01L27/0255H01L27/0605H01L27/0883H01L29/513H01L29/66143H01L29/7786H01L29/7787H01L29/872H01L29/2003H01L29/207
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 9,722,042
App. No.
15/079,227
Granted
Aug 1, 2017
Kind
B2
Abstract

The present invention discloses a group-III nitride semiconductor device, which comprises a substrate, a buffer layer, a semiconductor stack structure, and a passivation film. The buffer layer is disposed on the substrate. The semiconductor stack structure is disposed on the buffer layer and comprises a gate, a source, and a drain. In addition, a gate insulating layer is disposed between the gate and the semiconductor stack structure for forming a HEMT. The passivation film covers the HEMT and includes a plurality of openings corresponding to the gate, the source, and the drain, respectively. The material of the passivation film is silicon oxynitride.

Claims (13)

1. The method for fabricating a group-III nitride semiconductor device, comprising steps of:

etching a stack structure with a depth between 250 nm and 1000 nm, and forming a first semiconductor stack structure and a second semiconductor stack structure;

performing a first surface oxidation process;

coating an ohmic metal layer, removing said ohmic metal layer, forming a first source and a first drain on said first semiconductor stack structure, and forming a second source and a second drain on said second semiconductor stack structure;

defining fluorine-ion injection regions on said second semiconductor stack structure, and injecting fluorine ions; performing thermal treatment for fluorine ions and a second surface oxidation process;

coating an insulating layer, etching said insulating layer, forming a first gate insulating layer between said first source and said first drain, and forming a second gate insulating layer between said second source and said second drain;

coating a Schottky metal layer, removing said Schottky metal layer, forming a first gate on said first gate insulating layer, and forming a second gate on said second gate insulating layer; and

coating a passivation film, and forming a plurality of openings on said passivation film corresponding to said first drain, said second gate, and said second source, respectively.

2. The method for fabricating of claim 1 , wherein said stack structure comprises a channel layer, a barrier layer, and a cover layer.

3. The method for fabricating of claim 1 , and further comprising:

forming a third semiconductor stack structure and forming a protection diode on said third semiconductor stack structure while etching said stack structure;

forming a negative electrode on said protection diode concurrently while removing said ohmic metal layer; and

forming a positive electrode on said protection diode concurrently while removing said Schottky metal layer.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 26, 2021
From: JIANG, WEN-JANG
To: HUANG, CHIH-SHU
Reel/Frame 055027/0980 →
Priority Claims (1)
TW 104109854 A · Mar 26, 2015 · national
Continuity (1)
Related Publication 20160284815A1 · Sep 29, 2016