IP Library Patent Application 15082926
Patent Application
App. No. 15/082,926

Epitaxial Channel Transistors and Die With Diffusion Doped Channels

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Quick Facts
Patent No.
US None
App. No.
15/082,926
Abstract

Semiconductor structures can be fabricated by implanting a screen layer into a substrate, with the screen layer formed at least in part from a low diffusion dopant species. An epitaxial channel of silicon or silicon germanium is formed above the screen layer, and the same or different dopant species is diffused from the screen layer into the epitaxial channel layer to form a slightly depleted channel (SDC) transistor. Such transistors have inferior threshold voltage matching characteristics compared to deeply depleted channel (DDC) transistors, but can be more easily matched to legacy doped channel transistors in system on a chip (SoC) or multiple transistor semiconductor die.

Claims (14)

1 . A method for fabricating semiconductor structures, comprising:

implanting a screen layer into a substrate, the screen layer formed at least in part from a at least one dopant species,

forming an epitaxial channel layer above the screen layer, and

diffusing one of the dopant species from the screen layer into the epitaxial channel layer to form a slightly depleted channel (SDC) transistor.

2 . The method of claim 1 , wherein the epitaxial channel layer is formed as a blanket epitaxial layer that extends across multiple transistor device types, with at least one of the transistor device types being processed so that at least a portion of the epitaxial channel layer remain substantially undoped.

3 . The method of claim 1 , further comprising implanting a first and a second dopant species having different diffusion characteristics into the screen layer.

4 . The method of claim 3 , wherein the first dopant species comprises antimony and the second dopant species comprises arsenic, and further including the step of diffusing the arsenic into the epitaxial channel layer to form an SDC device.

5 . The method of claim 1 , wherein the epitaxial channel layer is between 5 and 50 nanometers in thickness.

6 . The method of claim 1 , further comprising:

forming the epitaxial channel layer as a blanket epitaxial layer that extends across multiple transistor device types, and

forming shallow trench isolation structures between at least some of the multiple transistor device types after the formation of the epitaxial layer.

7 . The method of claim 1 , wherein the epitaxial channel layer includes a dopant concentration less than the screen layer dopant concentration, with doping of the epitaxial channel layer occurring without direct ion implantation into the grown epitaxial channel layer.

8 . The method of claim 1 , further comprising forming a dopant migration resistant layer formed along with or above the screen layer, the dopant migration resistant layer reduces upward migration of dopants from the screen layer into the epitaxial channel layer.

9 . The method of claim 8 , wherein the dopant migration resistant layer includes carbon or germanium.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 29, 2016
From: SHIFREN, LUCIAN; RANADE, PUSHKAR; THOMPSON, SCOTT E.
To: SUVOLTA, INC.
Reel/Frame 038122/0173 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 29, 2016
From: SUVOLTA, INC.
To: MIE FUJITSU SEMICONDUCTOR LIMITED
Reel/Frame 038122/0205 →