Display device
A pixel portion and a driver circuit driving the pixel portion are formed over the same substrate. At least a part of the driver circuit is formed using an inverted staggered thin film transistor in which an oxide semiconductor layer is used and a channel protective layer is provided over the oxide semiconductor layer serving as a channel formation region which is overlapped with the gate electrode. The driver circuit as well as the pixel portion is provided over the same substrate to reduce manufacturing costs.
1. A display device comprising a pixel portion and a circuit,
wherein the pixel portion comprises a first thin film transistor including a first oxide semiconductor layer,
wherein the circuit comprises;
a second thin film transistor including a gate electrode, a second oxide semiconductor layer, and a first insulating layer in contact with the second oxide semiconductor layer;
a third thin film transistor including a third oxide semiconductor layer; and
a wiring is provided over the second oxide semiconductor layer and the third oxide semiconductor layer,
wherein the wiring is electrically connected to the second oxide semiconductor layer and the third oxide semiconductor layer,
wherein the gate electrode of the second thin film transistor is provided below the second oxide semiconductor layer,
wherein the gate electrode of the second thin film transistor includes a first region and a second region,
wherein the first region extends beyond a first end portion of the second oxide semiconductor layer in a channel length direction of the second thin film transistor,
wherein the second region extends beyond a second end portion of the second oxide semiconductor layer in the channel length direction of the second thin film transistor,
wherein a length of the first region is larger than a length of the second region in the channel length direction of the second thin film transistor,
wherein a gate insulating layer is provided between the wiring and the gate electrode of the second thin film transistor, and
wherein the wiring is in direct contact with the first region of the gate electrode of the second thin film transistor through a contact hole formed in the gate insulating layer.
2. The display device according to claim 1 , wherein the first insulating layer has an island shape.
3. The display device according to claim 1 , wherein each of the first oxide semiconductor layer, the second oxide semiconductor layer and the third oxide semiconductor layer comprises indium, gallium and zinc.
4. The display device according to claim 1 , wherein a fourth oxide semiconductor layer having smaller thickness and higher conductivity than the third oxide semiconductor layer is provided between the wiring and the third oxide semiconductor layer.
5. The display device according to claim 4 , wherein the fourth oxide semiconductor layer comprises indium, gallium and zinc.
6. The display device according to claim 1 , further comprising a second insulating layer over the first thin film transistor, the second thin film transistor, and the third thin film transistor, wherein the second insulating layer is in contact with the first insulating layer.
7. A display device comprising a pixel portion and a circuit,
wherein the pixel portion comprises a first thin film transistor including a first gate electrode, a first oxide semiconductor layer, and a first channel protective layer provided on and in contact with the first oxide semiconductor layer overlapped with the first gate electrode,
wherein the circuit comprises:
a second thin film transistor including a second gate electrode, a gate insulating layer on the second gate electrode, a second oxide semiconductor layer on the gate insulating layer, and a second channel protective layer provided on and in contact with the second oxide semiconductor layer overlapped with the second gate electrode;
a third thin film transistor including a third gate electrode, the gate insulating layer on the third gate electrode, a third oxide semiconductor layer on the gate insulating layer, and a third channel protective layer provided on and in contact with the third oxide semiconductor layer overlapped with the third gate electrode;
a first wiring provided over the second oxide semiconductor layer;
a second wiring provided over the second oxide semiconductor layer and the third oxide semiconductor layer; and
a third wiring provided over the third oxide semiconductor layer,
wherein the second gate electrode is provided below the second oxide semiconductor layer,
wherein the second gate electrode includes a first region and a second region,
wherein the first region extends beyond a first end portion of the second oxide semiconductor layer in a channel length direction of the second thin film transistor,
wherein the second region extends beyond a second end portion of the second oxide semiconductor layer in the channel length direction of the second thin film transistor,
wherein a length of the first region is larger than a length of the second region in the channel length direction of the second thin film transistor,
wherein the second wiring is a source wiring or a drain wiring of the third thin film transistor electrically connected to the third oxide semiconductor layer,
wherein the gate insulating layer is provided between the second wiring and the second gate electrode, and
wherein the second wiring is in direct contact with the first region of the second gate electrode through a contact hole formed in the gate insulating layer.
8. The display device according to claim 7 , wherein each of the first channel protective layer, the second channel protective layer, and the third channel protective layer has an island shape.
9. The display device according to claim 7 , wherein each of the first oxide semiconductor layer, the second oxide semiconductor layer and the third oxide semiconductor layer comprises indium, gallium and zinc.
10. The display device according to claim 7 , wherein a fourth oxide semiconductor layer having smaller thickness and higher conductivity than the third oxide semiconductor layer is provided between the source wiring and the third oxide semiconductor layer or between the drain wiring and the third oxide semiconductor layer.
11. The display device according to claim 10 , wherein the fourth oxide semiconductor layer comprises indium, gallium and zinc.
12. The display device according to claim 7 , further comprising an insulating layer over the first thin film transistor, the second thin film transistor, and the third thin film transistor,
wherein the insulating layer is in contact with the first channel protective layer, the second channel protective layer, and the third channel protective layer.