Imaging device and electronic device
View Patent ↗A semiconductor device with an arithmetic processing function is provided. In the semiconductor device, an imaging portion and an arithmetic portion are electrically connected to each other through an analog processing circuit 24 . The imaging portion includes a pixel array 21 in which pixels 20 used for imaging and reference pixels 22 used for image processing are arranged in a matrix, and a row decoder 25 . The arithmetic portion includes a memory element array 31 in which memory elements 30 and reference memory elements 32 are arranged in a matrix, an analog processing circuit 34 , a row decoder 35 , and a column decoder 36.
1. An imaging device comprising:
a pixel array comprising:
first pixels arranged in a matrix; and
second pixels shielded from light and arranged in a column;
a memory element array comprising:
first memory elements arranged in a matrix; and
second memory elements arranged in a row;
a first row decoder;
a first analog processing circuit;
a column decoder;
a second row decoder; and
a second analog processing circuit,
wherein the first pixels are electrically connected to the first row decoder through first wirings,
wherein the first pixels are electrically connected to the first analog processing circuit through second wirings,
wherein the second pixels are electrically connected to the first row decoder through the first wirings,
wherein the second pixels are electrically connected to the first analog processing circuit through a third wiring,
wherein the first memory elements are electrically connected to the first analog processing circuit through fourth wirings,
wherein the first memory elements are electrically connected to the column decoder through fifth wirings,
wherein the first memory elements are electrically connected to the second row decoder through sixth wirings,
wherein the first memory elements are electrically connected to the second analog processing circuit through seventh wirings,
wherein the second memory elements are electrically connected to the first analog processing circuit through the fourth wirings,
wherein the second memory elements are electrically connected to the column decoder through the fifth wirings,
wherein the second memory elements are electrically connected to the second row decoder through an eighth wiring, and
wherein the second memory elements are electrically connected to the second analog processing circuit through a ninth wiring.
2. The imaging device according to claim 1 ,
wherein the first pixels and the second pixels each comprise a first transistor, a second transistor, a third transistor, a first capacitor, and a photoelectric conversion element,
wherein one electrode of the photoelectric conversion element is electrically connected to one of a source electrode and a drain electrode of the first transistor,
wherein the other of the source electrode and the drain electrode of the first transistor is electrically connected to one of a source electrode and a drain electrode of the second transistor,
wherein the other of the source electrode and the drain electrode of the first transistor is electrically connected to a gate electrode of the third transistor, and
wherein the other of the source electrode and the drain electrode of the first transistor is electrically connected to one electrode of the first capacitor.
3. The imaging device according to claim 2 ,
wherein the first memory elements and the second memory elements each comprise a fourth transistor, a fifth transistor, and a second capacitor,
wherein one of a source electrode and a drain electrode of the fourth transistor is electrically connected to a gate electrode of the fifth transistor, and
wherein the gate electrode of the fifth transistor is electrically connected to one electrode of the second capacitor.
4. The imaging device according to claim 3 ,
wherein the first transistor, the second transistor, the third transistor, and the fourth transistor each comprise an oxide semiconductor in an active layer,
wherein the oxide semiconductor comprises In, Zn, and M, and
wherein M is Al, Ti, Ga, Sn, Y, Zr, La, Ce, Nd, or Hf.
5. The imaging device according to claim 1 , wherein the imaging device comprises a region where one of the first pixels and one of the first memory elements overlap with each other.
6. The imaging device according to claim 1 , further comprising a photoelectric conversion element in each of the first pixels and the second pixels,
wherein the photoelectric conversion element comprises selenium or a compound containing selenium in a photoelectric conversion layer.
7. An electronic device comprising:
the imaging device according to claim 1 ; and
a display device.
8. An imaging device comprising:
a pixel array comprising a first pixel and a second pixel;
a memory element array comprising a first memory element and a second memory element;
a first row decoder;
a first analog processing circuit;
a column decoder;
a second row decoder; and
a second analog processing circuit,
wherein the second pixel is covered with a light blocking layer,
wherein the first pixel and the second pixel are electrically connected to the first row decoder through a first wiring,
wherein the first pixel and the second pixel are electrically connected to the first analog processing circuit,
wherein the first memory element and the second memory element are electrically connected to the first analog processing circuit through a second wiring,
wherein the first memory element and the second memory element are electrically connected to the column decoder through a third wiring,
wherein the first memory element and the second memory element are electrically connected to the second row decoder, and
wherein the first memory element and the second memory element are electrically connected to the second analog processing circuit.
9. The imaging device according to claim 8 ,
wherein the first pixel and the second pixel each comprise a first transistor, a second transistor, a third transistor, a first capacitor, and a photoelectric conversion element,
wherein one electrode of the photoelectric conversion element is electrically connected to one of a source electrode and a drain electrode of the first transistor,
wherein the other of the source electrode and the drain electrode of the first transistor is electrically connected to one of a source electrode and a drain electrode of the second transistor,
wherein the other of the source electrode and the drain electrode of the first transistor is electrically connected to a gate electrode of the third transistor, and
wherein the other of the source electrode and the drain electrode of the first transistor is electrically connected to one electrode of the first capacitor.
10. The imaging device according to claim 9 ,
wherein the first memory element and the second memory element each comprise a fourth transistor, a fifth transistor, and a second capacitor,
wherein one of a source electrode and a drain electrode of the fourth transistor is electrically connected to a gate electrode of the fifth transistor, and
wherein the gate electrode of the fifth transistor is electrically connected to one electrode of the second capacitor.
11. The imaging device according to claim 10 ,
wherein the first transistor, the second transistor, the third transistor, and the fourth transistor each comprise an oxide semiconductor in an active layer,
wherein the oxide semiconductor comprises In, Zn, and M, and
wherein M is Al, Ti, Ga, Sn, Y, Zr, La, Ce, Nd, or Hf.
12. The imaging device according to claim 8 , wherein the imaging device comprises a region where the first pixel and the first memory element overlap with each other.
13. The imaging device according to claim 8 , further comprising a photoelectric conversion element in each of the first pixel and the second pixel,
wherein the photoelectric conversion element comprises selenium or a compound containing selenium in a photoelectric conversion layer.
14. An electronic device comprising:
the imaging device according to claim 8 ; and
a display device.