IP Library › Granted Patent US 9,799,683
Granted Patent B2
US 9,799,683 · App. 15/098,914 · Granted Oct 24, 2017

Array substrate, preparation method thereof and display device

Inventors: Xuecheng Hou (Beijing, CN); Kai Lu (Beijing, CN); Jian Guo (Beijing, CN)
Assignees: BOE TECHNOLOGY GROUP CO., LTD.; BEIJING BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.
H01L27/1248H01L27/124H01L27/1244H01L27/1259
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Quick Facts
Patent No.
US 9,799,683
App. No.
15/098,914
Granted
Oct 24, 2017
Kind
B2
Abstract

The present invention provides an array substrate, a preparation method thereof and a display device. The array substrate includes at least one thin film transistor and a resin layer having at least one resin via hole, wherein a film-thickness-difference-adjusting layer used for reducing the film thickness difference at the resin via hole is arranged at the lower part of the resin layer in at least a part of the resin via hole. By providing the film-thickness-difference-adjusting layer, the film thickness difference at the resin via hole can be effectively reduced, and when a photolithographic process is performed, the difference of the thickness of the photoresist here and the thicknesses at other positions is reduced, so that the via hole fluctuation of a passivation layer caused by the larger film thickness difference at the resin via hole is improved, and the metal residue problem of the pixel electrodes is effectively avoided.

Claims (17)

1. An array substrate, comprising at least one thin film transistor and a resin layer having at least one resin via hole, the thin film transistor comprising a source electrode, a drain electrode, a gate electrode and an active layer, and a passivation layer different than the resin layer, the passivation layer comprising a portion within the at least one resin via hole, which defines a tapered passivation via hole, wherein a film-thickness-difference-adjusting layer used for reducing the film thickness difference at the resin via hole is arranged at the lower part of the resin layer only corresponding to the resign via hole,

wherein the resign layer is arranged around the drain electrode and the film-thickness-difference-adjusting layer, the resign via hole is formed in the resign layer above the drain electrode, and the film-thickness-difference-adjusting layer is located below the drain electrode.

2. The array substrate of claim 1 , wherein the array substrate comprises a pixel region and a non-pixel region, the resin layer having the resin via hole is arranged in the pixel region, and the film-thickness-difference-adjusting layer is arranged at the lower part of the resin layer at the resin via hole in the pixel region.

3. The array substrate of claim 2 , wherein the drain electrode is arranged in the resin layer in the pixel region, the resin via hole is formed in the resin layer above the drain electrode and the projection of the film-thickness-difference-adjusting layer on the substrate and the projection of the drain electrode on the substrate at least partially overlap.

4. The array substrate of claim 3 , wherein the pixel region further comprises a gate insulation layer, and the film-thickness-difference-adjusting layer is arranged between the gate insulation layer and the drain electrode.

5. The array substrate of claim 3 , wherein the projections of the film-thickness-difference-adjusting layer and the drain electrode on the substrate completely overlap.

6. The array substrate of claim 1 , wherein the resin layer is composed of photosensitive resin or non-photosensitive resin.

7. The array substrate of claim 1 , wherein the thickness of the resin layer is 1.2-3.0 μm.

8. The array substrate of claim 1 , wherein the film-thickness-difference-adjusting layer is the active layer.

9. The array substrate of claim 1 , wherein the film-thickness-difference-adjusting layer is the same layer as the gate electrode layer and is independent relative to the gate electrode layer.

10. The array substrate of claim 1 , wherein the thickness of the film-thickness-difference-adjusting layer is 0.2-0.35 μm.

11. A display device, comprising the array substrate of claim 1 .

12. A preparation method of an array substrate comprising at least one thin film transistor and a resin layer having at least one resin via hole, the thin film transistor comprising a source electrode, a drain electrode, a gate electrode and an active layer, and a passivation layer different than the resin layer, the passivation layer comprising a portion within the at least one resin via hole, which defines a tapered passivation via hole, the preparation method of the array substrate comprising:

a step of forming a film-thickness-difference-adjusting layer, which is used for reducing the film thickness difference at the resin via hole, at the lower part of the resin layer only corresponding to the resin via hole,

wherein the resin layer is arranged around the drain electrode and the film-thickness-difference-adjusting layer, the resign via hole is formed in the resign layer above the drain electrode, and the film-thickness-difference-adjusting layer is located below the drain electrode.

13. The preparation method of the array substrate according to claim 12 , wherein the step of forming the film-thickness-difference-adjusting layer is a step of forming the active layer.

14. The preparation method of the array substrate according to claim 12 , wherein the step of forming the film-thickness-difference-adjusting layer is a step of forming the gate electrode.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 15, 2016
From: HOU, XUECHENG; LU, KAI; GUO, JIAN
To: BOE TECHNOLOGY GROUP CO., LTD.; BEIJING BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.
Reel/Frame 038294/0743 →
Priority Claims (1)
CN 2015 1 0363072 · Jun 26, 2015 · national
Continuity (1)
Related Publication 20160380005A1 · Dec 29, 2016