IP Library Granted Patent US 10,423,777
Granted Patent B2
US 10,423,777 · App. 15/099,494 · Granted Sep 24, 2019

Preventing execution of malicious instructions based on address specified in a branch instruction

Inventors: Matthew D. Spisak (Columbus, OH); Cody R. Pierce (Austin, TX); Kenneth D. Fitch (San Antonio, TX)
Assignee: Endgame, Inc.
G06F21/51G06F3/065G06F3/0619G06F3/0673G06F9/3004G06F9/30058G06F9/30145G06F9/32G06F11/30G06F21/554G06F21/566G06F2221/033
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Quick Facts
Patent No.
US 10,423,777
App. No.
15/099,494
Granted
Sep 24, 2019
Kind
B2
Abstract

In one aspect of the embodiments, malicious instructions executed or to be executed by a processor in a computing device are identified and preventive action is taken in response to that detection, thereby preventing harm to the computing device and the user's data by the malicious instructions. In another aspect of the embodiments, a thread context monitor determines which thread are active within an operating system at any given time, which further enhances the ability to determine which thread contains malicious instructions.

Claims (10)

1. A method of detecting malicious code within a computer system comprising a processor coupled to a memory device, the processor comprising a branch prediction unit and a performance monitoring unit, the method comprising:

generating a data structure containing one or more addresses, wherein each of the one or more addresses are within an address range assigned to a known software module;

detecting a failure by the branch prediction unit to predict an address that would be the subject of a branch instruction;

reporting, by the performance monitoring unit, the failure;

determining if the address is contained in the data structure; and

when the address is not contained in the data structure, implementing an action comprising one or more of issuing an alert, freezing a module in which the branch instruction is contained, capturing a snapshot of the memory device, and rebooting the computer system.

2. The method of claim 1 , wherein the action comprises issuing an alert.

3. The method of claim 1 , wherein the action comprises freezing a module in which the branch instruction is contained.

4. The method of claim 1 , wherein the action comprises capturing a snapshot of the memory device.

5. The method of claim 1 , wherein the action rebooting the computer system.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 17, 2026
From: ELASTICSEARCH, INC.
To: ELASTICSEARCH TECHNOLOGIES (US) INC.
Reel/Frame 073810/0013 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 17, 2026
From: ENDGAME SYSTEMS, INC.
To: ELASTICSEARCH, INC.
Reel/Frame 073810/0057 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 9, 2019
From: SPISAK, MATTHEW D.; PIERCE, CODY R.; FITCH, KENNETH D.
To: ENDGAME, INC.
Reel/Frame 050016/0802 →
Continuity (1)
Related Publication 20170300688A1 · Oct 19, 2017
Cited By (2)
US 12,615,152 US 12,621,156