DIGITALLY ASSISTED CURRENT SENSE CIRCUIT AND METHOD FOR DIGITIZING A SENSED SIGNAL
A method for digitizing a sensed signal in a digitally assisted current sense circuit and a digitally assisted current sense circuit that uses the disclosed method realize a simple way to sense and convert an analogue current signal into a digital signal. The method includes the steps of generating a voltage corresponding to a sensed inductor current I L ; and amplifying and buffering the voltage for creating an input signal to be converted by an analogue-to-digital converter (ADC). The ADC uses an estimate of the inductor current provided by a modified digital observer circuit as a starting point for an analogue-to-digital conversion.
1 . A method for digitizing a sensed signal in a digitally assisted current sense circuit, the method comprising: generating a voltage corresponding to a sensed inductor current I L ; amplifying and buffering the voltage for creating an input signal to be converted by an analogue-to-digital converter (ADC), wherein the ADC uses an estimate of the inductor current provided by a modified digital observer circuit as a starting point for an analogue-to-digital conversion.
2 . The method according to claim 1 , wherein the inductor current is estimated from already known variables in a controller of the modified digital observer circuit by applying a bi-linear transformation to an I-V-relationship of a voltage across a power inductor.
3 . The method according to claim 2 , wherein the estimate of the inductor current I L,est is calculated by the following I-V-relationship:
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L
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where V L is the voltage across the power inductor of inductance value L and dc resistance R L and T s is the power converters switching frequency.
4 . The method according to claim 1 , wherein the ADC comprises a successive-approximation-register analogue-to-digital converter (SAR ADC) that uses a modified data dependent algorithm for the analogue-to-digital conversion.
5 . The method according to claim 4 , wherein the modified data dependent algorithm comprises: using 4 clock cycles for sampling the input signal; using RANGE+2 additional clock cycles for completing the analogue-to-digital conversion, if the estimate of the inductor current provided by the digital observer circuit is within a range of +/−2 RANGE lsbs of the final result.
6 . The method according to claim 5 , comprising: if the sampled input falls within the range, the SAR ADC completes the analogue-to-digital conversion to the full resolution of the SAR ADC; if the sampled input is outside the range, the SAR ADC widens its search range by a factor of 2 with each further clock cycle and once the range is found where the sampled input falls in the analogue-to-digital conversion is completed to less accuracy.
7 . The method according to claim 5 , wherein RANGE is set based on an expected error of the estimator and noise of the sampled inductor current.
8 . A digitally assisted current sense circuit comprising: means for generating a voltage corresponding to a sensed inductor current I L (t); an amplifier for amplifying and means for buffering the voltage for creating an input signal to be converted to a corresponding digital signal; an analogue-to-digital converter (ADC) for converting the input signal to the digital signal; and a modified digital observer circuit for providing an estimate of the inductor current I L as a starting point for the analogue-to-digital conversion of the ADC.
9 . The digitally assisted current sense circuit according to claim 8 , wherein the modified digital observer circuit comprises a controller providing inputs for an input voltage, an output voltage, a clock cycle and a previous inductor current measurement and an output connected to an input of the ADC for forwarding an estimate of the inductor current to the ADC.
10 . The digitally assisted current sense circuit according to claim 9 wherein the ADC comprises a successive-approximation-register analogue-to-digital converter (SAR ADC).
11 . The digitally assisted current sense circuit according to claim 9 wherein the ADC comprises a flash analogue-to-digital converter (Flash ADC).
12 . The digitally assisted current sense circuit according to claim 11 wherein the output of the modified digital observer circuit is connected to the input of the Flash ADC; wherein a number of comparators needed for the estimation is reduced by using the modified digital observer circuit.