IP Library Granted Patent US 9,966,871
Granted Patent B2
US 9,966,871 · App. 15/104,116 · Granted May 8, 2018

Rectification device, alternator, and power conversion device

Inventors: Tetsuya Ishimaru (Tokyo, JP); Kohhei Onda (Tokyo, JP); Junichi Sakano (Tokyo, JP); Mutsuhiro Mori (Tokyo, JP)
Assignee: Hitachi Power Semiconductor Device, Ltd.
H02M7/04H02M1/08H02M7/219H03K17/163H02M2001/0029H02M2007/2195Y02B70/1408
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Quick Facts
Patent No.
US 9,966,871
App. No.
15/104,116
Granted
May 8, 2018
Kind
B2
Abstract

A rectifier including an autonomous type synchronous-rectification MOSFET is provided, which prevents chattering and through-current caused by a malfunction when a noise is applied. The rectifier includes: a rectification MOSFET for performing synchronous rectification; a determination circuit configured to input a voltage between a pair of main terminals of the rectification MOSFET, and to determine whether the rectification MOSFET is in on or off state on the basis of the inputted voltage; and a gate drive circuit configured such that a gate of the rectification MOSFET is turned on and off by a comparison signal from the determination circuit, and such that a time required to boost a gate voltage when the rectification MOSFET is turned on is longer than a time required to lower the gate voltage when the rectification MOSFET is turned off.

Claims (46)

1. A rectifier comprising:

a rectification MOSFET configured to perform synchronous rectification;

a determination circuit configured to:

input a voltage between a pair of main terminals of the rectification MOSFET; and

determine on and off states of the rectification MOSFET on a basis of the voltage between the pair of main terminals,

a gate drive circuit configured to:

perform turn on and turn off of a gate of the rectification MOSFET according to a determination result from the determination circuit; and

make a time required for boosting a gate voltage when turning on the rectification MOSFET longer than a time required for lowering the gate voltage when turning off the rectification MOSFET;

wherein the gate drive circuit is configured to include:

a first CMOS buffer including a high-side MOSFET and a low-side MOSFET, wherein an output of the first CMOS buffer is connected to the gate of the rectification MOSFET, and wherein

a current flowing through the high-side MOSFET of the first CMOS buffer when turning on the rectification MOSFET is smaller than a current flowing through the low-side MOSFET of the first CMOS buffer when turning off the rectification MOSFET;

wherein the gate drive circuit includes a second CMOS buffer having an output connected to an input of the first CMOS buffer; and

wherein a current flowing through a low-side MOSFET of the second CMOS buffer when turning on the rectification MOSFET is smaller than a current flowing through a high-side MOSFET of the second CMOS buffer when turning off the rectification MOSFET.

2. The rectifier according to claim 1 , wherein

the first CMOS buffer is configured so that a quotient obtained by dividing a gate width of the high-side MOSFET by a gate length of the high-side MOSFET is less than a double of a quotient obtained by dividing a gate width of the low-side MOSFET by a gate length of the low-side MOSFET.

3. The rectifier according to claim 1 , wherein

the first CMOS buffer is configured to have a resistor connected in series to the high-side MOSFET and placed in a path of a current for turning on the gate of the rectification MOSFET.

4. The rectifier according to claim 1 , wherein

a constant-current circuit is connected in series with the high-side MOSFET of the first CMOS buffer, and placed in a path of a current for turning on the gate of the rectification MOSFET.

5. The rectifier according to claim 1 , wherein

a resistor and a diode are connected in parallel between the output of the first CMOS buffer and the gate of the rectification MOSFET,

the diode is connected in a direction in which a current flows from the gate of the rectification MOSFET to the output of the first CMOS buffer.

6. The rectifier according to claim 1 , wherein

the second CMOS buffer is configured so that a quotient obtained by dividing a gate width of the high-side MOSFET by a gate length of the high-side MOSFET is greater than a double of a quotient obtained by dividing a gate width of the low-side MOSFET by a gate length of the low-side MOSFET.

7. The rectifier according to claim 1 , wherein

the gate drive circuit includes a third CMOS buffer having an output connected to an input of the second CMOS buffer, wherein

a current flowing through a high-side MOSFET of the third CMOS buffer when turning on the rectification MOSFET is smaller than a current flowing through a low-side MOSFET of the third CMOS buffer when turning off the rectification MOSFET.

8. The rectifier according to claim 7 , wherein

the third CMOS buffer is configured so that a quotient obtained by dividing a gate width of the high-side MOSFET by a gate length of the high-side MOSFET is smaller than a double of a quotient obtained by dividing a gate width of the low-side MOSFET by a gate length of the low-side MOSFET.

9. The rectifier according to claim 1 , wherein

the determination circuit is a comparator including a MOSFET.

10. The rectifier according to claim 1 , wherein

a current flowing through the determination circuit is regulated by a constant-current circuit.

11. The rectifier according to claim 1 , wherein

the determination circuit includes a bipolar transistor and a diode,

if the rectification MOSFET is in a first state of either one of on and off, the bipolar transistor is in an off state and a forward current flows through the diode;

if the rectification MOSFET is in a second state of either one of on or off, the second state being different from the first state, the bipolar transistor is in an on state and no forward current flows through the diode.

12. The rectifier according to claim 1 , wherein

the time required for lowering the gate voltage when turning off the rectification MOSFET is a time from when the gate voltage becomes 90% of a maximum gate voltage until when the gate voltage reaches a threshold voltage of the rectification MOSFET;

the time required for boosting the gate voltage when turning on the rectification MOSFET is a time from when the gate voltage becomes 10% of the maximum gate voltage until when the gate voltage reaches the threshold voltage of the rectification MOSFET.

13. An alternator comprising:

a rectification circuit of bridge-type, in which a DC terminal is connected to a battery and an AC terminal is connected to an AC power source;

the rectifiers according to claim 1 that are connected respectively to a high-side and a low-side of the rectification circuit.

14. A power converter comprising:

a rectification circuit of bridge-type, in which a DC terminal is connected to an energy storing unit and an AC terminal is connected to an AC power source;

the rectifiers according to claim 1 that are connected respectively to a high-side and a low-side of the rectification circuit.

Assignments (2)
CHANGE OF NAME Recorded Apr 30, 2025
From: HITACHI POWER SEMICONDUCTOR DEVICE LTD.
To: MINEBEA POWER SEMICONDUCTOR DEVICE INC.
Reel/Frame 071142/0232 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 15, 2016
From: ISHIMARU, TETSUYA; ONDA, KOHHEI; SAKANO, JUNICHI; MORI, MUTSUHIRO
To: HITACHI POWER SEMICONDUCTOR DEVICE, LTD.
Reel/Frame 040041/0733 →
Priority Claims (1)
JP 2013-257733 · Dec 13, 2013 · national
Continuity (1)
Related Publication 20160315553A1 · Oct 27, 2016