Managing a multi-lane serial link

1. A method for managing a multi-lane serial link, comprising:

establishing a serial link between a number of integrated circuits across a first number of lanes, in which the first number of lanes comprises a subset of a number of available lanes on the serial link;

selecting to change a transmission state of a second number of lanes, in which the second number of lanes comprises a subset of the available lanes;

changing the transmission state of the second number of lanes while transmitting data on a number of remaining lanes; and

after receiving an indication that the transmission state of the second number of lanes has been changed, synchronizing the first number of lanes and the second number of lanes.

2. The method of claim 1 , in which the serial link is a serializer/deserializer (SERDES) link.

3. The method of claim 1 , in which changing the transmission state of the second number of lanes comprises executing a number of operations to setup the second number of lanes.

4. The method of claim 1 , in which changing the transmission state of the second number of lanes comprises executing a number of operations to shut down the second number of lanes.

5. The method of claim 1 , in which changing the transmission state of the second number of lanes comprises, changing the second number of lanes from a dormant state to an active state, changing the second number of lanes from an active state to a dormant state, or combinations thereof.

6. A system for managing a multi-lane serial link, comprising:

a processor;

memory communicatively coupled to the processor; and

a link controller, the link controller comprising:

an establish module to establish a serial link between a number of integrated circuits across a first number of lanes, in which the first number of lanes comprises a subset of a number of available lanes on the serial link;

a change module to change a transmission state of a second number of lanes while transmitting data on a number of remaining lanes, in which the second number of lanes comprises a subset of the available lanes;

an indicate module to indicate when to change the transmission state of the second number of lanes; and

a synchronization module to synchronize the available number of lanes after changing the transmission state of the second number of lanes.

7. The system of claim 6 , in which the serial link is a serializer/deserializer (SERDES) link and in which the link controller is a SERDES controller.

8. The system of claim 6 , in which the second number of lanes are dormant upon selection.

9. The system of claim 6 , in which the second number of lanes are active upon selection.

10. A computer program product for managing a multilane serial link, the computer program product comprising:

a non-transitory computer readable storage medium comprising computer usable program code embodied therewith, the computer usable program code comprising: computer usable program code to, when executed by a processor, establish a first serial link between a number of integrated circuits across a first number of lanes, in which the first number of lanes comprises a subset of a number of available lanes on the serial link;

computer usable program code to, when executed by a processor, select to change a transmission state of a second number of lanes, in which the second number of lanes comprises at least one of the available lanes;

computer usable program code to, when executed by a processor, change the transmission state of the second number of lanes while transmitting data on a first number of remaining lanes; and

computer usable program code to, when executed by a processor, synchronize the first number of lanes and the second number of lanes for data transmission after receiving an indication that the transmission state of the second number of lanes has been changed.

11. The product of claim 10 , in which the serial link is a serializer/deserializer (SERDES) link.

12. The product of claim 10 , further comprising:

computer usable program code to, when executed by a processor, establish a second serial link between a number of integrated circuits across a third number of lanes, in which the second number of lanes comprises a subset of a number of available lanes on the second serial link;

computer usable program code to, when executed by a processor, select to change a transmission state of a fourth number of lanes, in which the fourth number of lanes comprises a subset of the number of available lanes on the second serial link;

computer usable program code to, when executed by a processor, change the transmission state of the fourth number of lanes while transmitting data on the second number of remaining lanes; and

computer usable program code to, when executed by a processor, synchronize the third number of lanes and the fourth number of lanes.

13. The product of claim 12 , in which the second serial link transmits data in an opposite direction of the first serial link, and in which the fourth number of lanes is less than or greater than the second number of lanes.

14. A method for managing a multi-lane serial link, comprising:

establishing a serial link between a number of integrated circuits across a first number of lanes, in which the first number of lanes comprises a subset of a number of available lanes on the serial link;

selecting to change a transmission state of a second number of lanes, in which the second number of lanes comprises a subset of the available lanes;

changing the transmission state of the second number of lanes while transmitting data on a number of remaining lanes, wherein changing the transmission state of the second number of lanes comprises executing a number of operations to setup the second number of lanes; and

synchronizing the first number of lanes and the second number of lanes.

15. A method for managing a multi-lane serial link, comprising:

establishing a serial link between a number of integrated circuits across a first number of lanes, in which the first number of lanes comprises a subset of a number of available lanes on the serial link;

selecting to change a transmission state of a second number of lanes, in which the second number of lanes comprises a subset of the available lanes;

changing the transmission state of the second number of lanes while transmitting data on a number of remaining lanes, wherein changing the transmission state of the second number of lanes comprises executing a number of operations to shut down the second number of lanes; and

synchronizing the first number of lanes and the second number of lanes.

16. A method for managing a multi-lane serial link, comprising:

establishing a serial link between a number of integrated circuits across a first number of lanes, in which the first number of lanes comprises a subset of a number of available lanes on the serial link;

selecting to change a transmission state of a second number of lanes, in which the second number of lanes comprises a subset of the available lanes;

changing the transmission state of the second number of lanes while transmitting data on a number of remaining lanes, wherein changing the transmission state of the second number of lanes comprises changing the second number of lanes from a dormant state to an active state, changing the second number of lanes from an active state to a dormant state, or combinations thereof; and

synchronizing the first number of lanes and the second number of lanes.

17. A system for managing a multi-lane serial link, comprising:

a processor;

memory communicatively coupled to the processor; and

a link controller, the link controller comprising:

an establish module to establish a serial link between a number of integrated circuits across a first number of lanes, in which the first number of lanes comprises a subset of a number of available lanes on the serial link;

a change module to change a transmission state of a second number of lanes that are active upon selection while transmitting data on a number of remaining lanes, in which the second number of lanes comprises a subset of the available lanes; and

a synchronization module to synchronize the available number of lanes after changing the transmission state of the second number of lanes.