IP Library Granted Patent US 9,924,597
Granted Patent B2
US 9,924,597 · App. 15/111,305 · Granted Mar 20, 2018

Copper clad laminate for forming of embedded capacitor layer, multilayered printed wiring board, and manufacturing method of multilayered printed wiring board

Inventors: Fujio Kuwako (Saitama, JP); Toshifumi Matsushima (Saitama, JP); Toshihiro Hosoi (Saitama, JP)
Assignee: MITSUI MINING & SMELTING CO., LTD.
H05K1/162B32B15/00B32B15/04B32B15/20H05K1/0298H05K1/09H05K1/115H05K3/0047H05K3/022H05K3/429H05K3/4623H05K3/4644B32B2307/51B32B2457/00B32B2457/08B32B2457/16H05K2201/09763
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Quick Facts
Patent No.
US 9,924,597
App. No.
15/111,305
Granted
Mar 20, 2018
Kind
B2
Abstract

A material for forming of the capacitor layer which generates no crack in drilling on the dielectric layer of the capacitor in manufacturing of a highly multilayered printed wiring board embedded a capacitor circuit. Copper clad laminate for forming of an embedded capacitor layer of a multilayered printed wiring board including an embedded capacitor circuit having a layer structure of copper layer/dielectric layer of the capacitor/copper layer in an inner layer characterized in that the composite elastic modulus Er of the resin film constituting the dielectric layer of the capacitor along the thickness direction is less than 6.1 GPa is employed.

Claims (10)

1. A manufacturing method of a multilayered printed wiring board embedded a capacitor circuit using the copper clad laminate for forming of an embedded capacitor layer, characterized in comprising:

Manufacturing of multilayered laminate: A multilayered laminate having a desired number of layers is manufactured through, preparing of a capacitor circuit-provided laminate provided with an electrode circuit on both sides of a dielectric layer of the capacitor containing a resin film having a composite elastic modulus Er measured by a nanoindentation method of less than 6.1 GPa as a constituent material; and laminating of required number of printed wiring boards having two or more layers on both sides of the capacitor circuit-provided laminate via an insulating layer-constituting material;

Boring: Holes for forming of a through-hole are bored by drilling in the multilayered laminate at required points; and

Finishing: The multilayered printed wiring board embedded a capacitor circuit is manufactured after boring of the holes for forming of a through-hole through, forming of an outer wiring after conducting necessary processing including smear removal by desmearing, forming of interlayer connection, and plating treatment.

2. The manufacturing method of a multilayered printed wiring board embedded a capacitor circuit according to claim 1 , wherein

number of layers of the multilayered laminate manufactured by laminating printed wiring boards having two or more layers on both sides of the capacitor circuit-provided laminate via an insulating layer-constituting material is 8 or more.

3. The manufacturing method of a multilayered printed wiring board embedded a capacitor circuit according to claim 1 , wherein

each layer of the multilayered laminate includes an insulating layer-constituting material.

4. The manufacturing method of a multilayered printed wiring board embedded a capacitor circuit according to claim 1 , wherein

the thickness of the dielectric layer of the capacitor is 30 μm or less.

Assignments (2)
CHANGE OF NAME Recorded Mar 31, 2026
From: MITSUI MINING AND SMELTING COMPANY, LIMITED
To: MITSUI KINZOKU COMPANY, LIMITED
Reel/Frame 075357/0342 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 13, 2016
From: KUWAKO, FUJIO; MATSUSHIMA, TOSHIFUMI; HOSOI, TOSHIHIRO
To: MITSUI MINING & SMELTING CO., LTD.
Reel/Frame 039148/0087 →
Priority Claims (1)
JP 2014-032288 · Feb 21, 2014 · national
Continuity (1)
Related Publication 20160330839A1 · Nov 10, 2016