IP Library Granted Patent US 10,008,525
Granted Patent B2
US 10,008,525 · App. 15/118,956 · Granted Jun 26, 2018

Imaging element and imaging apparatus

Inventors: Yosuke Ueno (Kanagawa, JP); Yusuke Ikeda (Tokyo, JP); Shizunori Matsumoto (Kanagawa, JP); Tsutomu Haruta (Kanagawa, JP); Rei Yoshikawa (Kanagawa, JP)
Assignee: Sony Corporation
H01L27/14614H01L27/14601H01L27/14609H01L27/14612H01L27/14627H01L27/14634H01L27/14643H04N5/357H04N5/3698H04N5/378H04N5/3745
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Quick Facts
Patent No.
US 10,008,525
App. No.
15/118,956
Granted
Jun 26, 2018
Kind
B2
Abstract

An imaging element comprises a photoelectric conversion unit formed in a pixel region and configured to convert light into electrical charge. Further, the imaging element includes a transistor formed in the pixel region and configured to transfer electric charge from the photoelectric conversion unit. The photoelectric conversion unit of the imaging element may be connected to a well of the pixel region, where the well of the pixel region has a negative potential.

Claims (44)

1. An imaging element comprising:

a pixel region including:

a photoelectric converter that converts light into electrical charge and that is coupled to a first well having a negative potential; and

a transistor that transfers electric charge from the photoelectric converter; and

a peripheral circuit region including:

a second well having a potential different from the negative potential of the first well of the pixel region; and

a negative voltage generator that provides the negative potential.

2. The imaging element of claim 1 , further comprising a switch, wherein in a first configuration, the switch connects a gate of the transistor to a power supply, and in a second configuration, the switch connects the gate of the transistor to a negative potential other than the negative potential of the pixel region.

3. The imaging element of claim 2 , wherein the negative potential of the pixel region is between the negative potential of the gate of the transistor and a potential of the power supply.

4. The imaging element of claim 2 , wherein the negative voltage generator is connected to a circuit ground having a potential that is different from the negative potential of the gate of the transistor and the potential of the power supply.

5. The imaging element of claim 2 , further comprising:

a floating diffusion region configured to generate a voltage according to an amount of electrical charge transferred from the photoelectric converter;

a reset transistor configured to reset the floating diffusion region; and

an amplifier transistor connected to the floating diffusion region and a pixel signal line, wherein the amplifier transistor is configured to amplify a potential of the floating diffusion region.

6. The imaging element of claim 5 , wherein a well of one or more of the transistor, the reset transistor, and the amplifier transistor are connected to the first well.

7. The imaging element of claim 1 , wherein a well of the transistor is connected to the first well.

8. The imaging element of claim 1 , wherein the pixel region is formed in a first semiconductor substrate and the peripheral circuit region is formed in a second semiconductor substrate.

9. The imaging element of claim 8 , wherein the first semiconductor substrate and the second semiconductor substrate form a multilayer structure.

10. An electronic apparatus comprising:

an optical unit having one or more lenses;

an analog to digital converter unit; and

an image sensor unit including a plurality of unit pixels formed in a pixel region and arranged in a two-dimensional matrix, wherein each unit pixel of the plurality of unit pixels includes:

a pixel region including:

a photoelectric converter that converts light into electrical charge and that is coupled to a first well having a negative potential; and

a transistor that transfers electric charge from the photoelectric converter; and

a peripheral circuit region including:

a second well having a potential different from the negative potential of the first well of the pixel region; and

a negative voltage generator that provides the negative potential.

11. The electronic apparatus of claim 10 , further comprising a switch, wherein in a first configuration, the switch connects a gate of the transistor to a power supply, and in a second configuration, the switch connects the gate of the transistor to a negative potential other than the negative potential of the pixel region.

12. The electronic apparatus of claim 11 , wherein the negative potential of the pixel region is between the negative potential of the gate of the transistor and a potential of the power supply.

13. The electronic apparatus of claim 11 , wherein the negative voltage generator is connected to a circuit ground having a potential that is different from the negative potential of the gate of the transistor and the potential of the power supply.

14. The electronic apparatus of claim 11 , further comprising:

a floating diffusion region configured to generate a voltage according to an amount of electrical charge transferred from the photoelectric converter;

a reset transistor configured to reset the floating diffusion region; and

an amplifier transistor connected to the floating diffusion region and a pixel signal line, wherein the amplifier transistor is configured to amplify a potential of the floating diffusion region.

15. The electronic apparatus of claim 14 , wherein a well of one or more of the transistor, the reset transistor, and the amplifier transistor are connected to the first well.

16. The electronic apparatus of claim 10 , wherein a well of the transistor is connected to the first well.

17. An imaging element comprising:

a photoelectric converter connected to a well of a pixel region having a negative potential and configured to convert light into electrical charge;

a floating diffusion region configured to generate a voltage according to an amount of electrical charge transferred from the photoelectric converter;

a reset transistor configured to initialize an amount of electrical charge accumulated in the floating diffusion region;

a readout transistor configured to transfer electric charge from the photoelectric converter to the floating diffusion region;

a negative voltage generator; and

a switch, wherein in a first configuration, the switch electrically connects a gate of the readout transistor to a common power supply potential, and in a second configuration, the switch electrically connects the gate of the readout transistor to a negative potential provided by the negative voltage generator, the negative potential provided by the negative voltage generator being less than the common power supply potential and the negative potential of the pixel region.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 16, 2016
From: UENO, YOSUKE; IKEDA, YUSUKE; MATSUMOTO, SHIZUNORI; HARUTA, TSUTOMU; YOSHIKAWA, REI
To: SONY CORPORATION
Reel/Frame 039457/0616 →
Priority Claims (1)
JP 2014-034369 · Feb 25, 2014 · national
Continuity (1)
Related Publication 20170053957A1 · Feb 23, 2017
Cited By (2)
US 12,250,483 US 12,739,532